LP3910SQ-AN Datasheet, PDF (56/60 Pages) National Semiconductor (TI) – Power Management IC for Hard Drive Based Portable Media Players

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Voltage peak-to-peak ripple due to ESR can be expressed as
follows:
V_PP-ESR = 2 * I_RIPPLE * R_ESR
Because the V_PP-C and V_PP-ESR are out of phase, the RMS
value can be used to get an approximate value of the peak-
to-peak ripple:
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Note that the output voltage ripple is dependent on the induc-
tor current ripple and the equivalent series resistance of the
output capacitor (R_ESR). The R_ESR is frequency dependent as
well as temperature dependent. The R_ESR should be calcu-
lated with the applicable switching frequency and ambient
temperature.
Capacitor
C_VDD
C_{CHG_DET}
C_USB
C_BATT
C_LDO1
C_LDO2
C_VREFH
C_VIN2,3
CVBUCK1,2
C_BB
C_VIN1
C_VIN4
Min
Value
4.7
4.7
4.7
4.7
1.0
1.0
0.1
10
10
22
1
10
Unit Description
μF Charger Input Capacitor
μF Charger Input Capacitor
μF USB Power (V_BUS) Capacitor
μF Li-ion Battery Capacitor
μF LDO Output Capacitor
μF LDO Output Capacitor
μF Bypass Capacitor for Internal Voltage Reference
μF BUCK1, BUCK2 Input Capacitor
μF BUCK1,2 Output Capacitor
μF BUCK-BOOST Output Capacitor
μF LDO Bypass Capacitor
μF Buck & Buck-Boost Bypass Capacitor
Recommended Type
Ceramic, 6.3V, X5R
Ceramic, 6.3V, X5R
Ceramic, 6.3V, X5R
Ceramic, 6.3V, X5R
Ceramic, 6.3V, X5R
Ceramic, 6.3V, X5R
Ceramic, PolyPropylene and
Polycarbonate Film
Ceramic, 6.3V, X5R
Ceramic, 6.3V, X5R
Ceramic, 6.3V, X5R
Ceramic, 6.3V, X5R
Ceramic, 6.3V, X5R
Schottky Diode on Charger Input CHG_IN
A Schottky diode is required in the external adapter path to
block the reverse current from either the USB or the battery
source. The most critical parameter in the selection of the right
Schottky diode is the leakage current, which needs to be be-
low 10 µA over the temperature range in order to prevent false
detection of the presence of an external adapter. In addition
the Schottky diode should have a maximum voltage rating of
10V or higher. The current rating depends on the current limit
of the adapter. The forward voltage should be limited to 500
mV at its maximum current. The recommended Schottky
diode is MBRA210ET3 from ON Semiconductor which has a
reverse leakage current under 1 µA at room temperature and
a forward voltage drop of 500 mV at their max rated current
I_F = 2A.
RESISTORS
Battery Thermistor
The LP3910SQ-AN battery thermistor bias provided by the
T_S pin is tailored to thermistors with the following specifica-
tion:
Negative Temperature Coefficient
10 kΩ resistance
A suitable solution is available from AVX thermistors: AVXN-
B21K00103
http://www.avxcorp.com/docs/Catalogs/nb21-23.pdf
I²C Pullup Resistors
I²C_SDA, I²C_SCL terminals need to have pullup resistors
connected to the V_DDIO pin. V_DDIO must be connected to a
power supply that is less than or equal to V_DD, such as
BUCK2. The values of the pull-up resistors (typ. ≈1.8 kΩ) are
determined by the capacitance of the bus. Too large of a re-
sistor combined with a given bus capacitance will result in a
rise time that would violate the max rise time specification.
Too small of a resistor will result in a contention with the pull-
down transistor on either slave(s) or master.
R_IREF Resistor
The current through this resistor is used as a reference cur-
rent that biases many analog circuits inside the LP3910SQ-
AN and needs to have a resistance of 121 kΩ ±1%
R_ISENSE Resistor
The current through this resistor is used as a reference cur-
rent for the charge current. The accuracy of the ADC is
dependent on the tolerance of this resistor. R_ISENSE needs to
have a resistance of 4.64 kΩ ±1% tolerance.
Operation without I²C Interface
Operation of the LP3910SQ-AN without the I²C interface is
possible if the system can operate with default values for the
DC/DC converters and the charger. (Read below: Factory
programmable options). The I²C-less system must use the
POWERACK pin to power cycle the LP3910SQ-AN.
I²C Master Power Concern
The processor that contains the I²C master should be pow-
ered by BUCK1 or LDO2 as these converters require no I²C
access to enable/disable them. If the I²C master were to be
powered by a DC/DC converter that is enable/disabled
through a control register, then a corrupted application soft-
ware execution could by accident disable the power to the
I²C master, which in this case has no means to recover. It is
possible that the regulator connected to V_DDIO could acciden-
tally disable, in which case the processor should be able to
recognize that communication has been broken and then
power down the system to allow for a clean restart.
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