English
Language : 

LP3910SQ-AN Datasheet, PDF (4/60 Pages) National Semiconductor (TI) – Power Management IC for Hard Drive Based Portable Media Players
Pin Descriptions
Name
TS
VBATT1
AGND
VREFH
LDO2EN
VLDO2
VIN1
VLDO1
POWERACK
ISENSE
ADC2
ADC1
IRQB
NRST
CHG
STAT
BUCK1EN
VFB1
BCKGND1
VBUCK1
VIN2
VIN3
VBUCK2
BCKGND2
VFB2
ONOFF
I2C_SCL
VDDIO
I2C_SDA
ONSTAT
VBBFB
VBBOUT
VBBL2
BBGND1
VBBL1
VIN4
USBSUSP
USBISEL
BBGND2
DGND
I/O
Type
Functional Description
Pin #
I
A
Battery temperature sense pin. This pin is normally connected to the thermistor
1
pin of the battery cell.
O
A
Positive battery terminal. This pin must be externally shorted to VBATT2 and
2
VBATT3
G
G
Analog Ground
3
O
A
Connection to bypass capacitor for internal high reference
4
I
D
Digital input to enable/disable LDO2
5
O
A
LDO2 Output
6
I
PWR
Power input to LDO1 and LDO2. VIN1 pin must be externally shorted to the VDD 7
pins.
O
A
LDO1 Output
8
I
D
Digital power acknowledgement input (see Power Sequencing)
9
I
A
A 4.64 kΩ resistor must be connected between this pin and GND. A fraction of
10
the charge current flows through this resistor to enable the A to D converter to
measure the charge current.
I
A
Channel 2 input to AD converter
11
I
A
Channel 1 input to AD converter
12
O Open Drain Open drain active low interrupt request
13
O Open Drain Open drain active low reset during Standby
14
O
D
This output indicates that a valid charger supply source (USB adapter) has been 15
detected, and the IC is charging. (Red LED)
O
D
Battery Status output indicator - Off during CC, 50% duty cycle during CV, 100% 16
duty cycle with a fully charged Li-ion battery (Green LED)
I
D
Digital input to enable/disable BUCK1
17
I
A
BUCK1 Feedback input terminal
18
G
G
BUCK1 Ground
19
O
A
BUCK1 Output
20
I
PWR
Power input to BUCK1. VIN2 pin must be externally shorted to the VDD pins.
21
I
PWR
Power input to BUCK2. VIN3 pin must be externally shorted to the VDD pins.
22
O
A
BUCK2 Output
23
G
G
BUCK2 Ground
24
I
A
BUCK2 Feedback input terminal
25
I
D
Power ON/OFF pin configured either as level (High or Low) triggered or edge
26
(High or Low) triggered.
I
D
I2C compatible interface clock terminal
27
I
D
Supply to input / output stages of digital I/O
28
I/O
D
I2C compatible interface data terminal
29
O Open Drain Open Drain output that reflects the debounced state of ONOFF pin.
30
I
A
Buck/Boost Feedback input terminal
31
O
A
Buck/Boost Output voltage
32
I
A
Buck/Boost inductor
33
G
G
Buck/Boost high current ground
34
I
A
Buck/Boost inductor
35
I
PWR
Power input to Buck/Boost. VIN4 pin must be externally shorted to the VDD pins. 36
I
D
This pin needs to be pulled high during USB suspend mode.
37
I
D
Pulling this pin low limits the USB charge current to 100 mA. Pulling this pin high 38
limits the USB charge current to 500 mA.
G
G
Buck/Boost Core Ground
39
G
G
Digital ground
40
www.national.com
4