COP888FH Datasheet, PDF (42/49 Pages) National Semiconductor (TI) – 8-Bit CMOS ROM Based Microcontrollers with 12k Memory, Comparators, USART and Hardware Multiply/Divide

Instruction Execution Time
Most instructions are single byte (with immediate addressing
mode instructions taking two bytes).
Most single byte instructions take one cycle time to execute.
Skipped instructions require x number of cycles to be
skipped, where x equals the number of bytes in the skipped
instruction opcode.
See the BYTES and CYCLES per INSTRUCTION table for
details.
Bytes and Cycles per Instruction
The following table shows the number of bytes and cycles for
each instruction in the format of byte/cycle.
Arithmetic and Logic Instructions
ADD
ADC
SUBC
AND
OR
XOR
IFEQ
IFNE
IFGT
IFBNE
DRSZ
SBIT
RBIT
IFBIT
[B]
Direct
1/1
3/4
1/1
3/4
1/1
3/4
1/1
3/4
1/1
3/4
1/1
3/4
1/1
3/4
1/1
3/4
1/1
3/4
1/1
1/3
1/1
3/4
1/1
3/4
1/1
3/4
RPND
1/1
Immed.
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
Instructions Using A & C
CLRA
1/1
INCA
1/1
DECA
1/1
LAID
1/3
DCOR
1/1
RRCA
1/1
RLCA
1/1
SWAPA
1/1
SC
1/1
RC
1/1
IFC
1/1
IFNC
1/1
PUSHA
1/3
POPA
1/3
ANDSZ
2/2
Transfer of Control Instructions
JMPL
3/4
JMP
2/3
JP
1/3
JSRL
3/5
JSR
2/5
JID
1/3
VIS
1/5
RET
1/5
RETSK
1/5
RETI
1/5
INTR
1/7
NOP
1/1
Memory Transfer Instructions
Register
Direct
Indirect
[B]
[X]
X A,*
1/1
1/3
2/3
LD A,*
1/1
1/3
2/3
LD B, Imm
LD B, Imm
LD Mem, Imm
2/2
3/3
LD Reg, Imm
2/3
IFEQ MD, Imm
3/3
* = > Memory location addressed by B or X or directly.
Immed.
2/2
1/1
2/2
Register Indirect
Auto Incr. & Decr.
[B+, B−] [X+, X−]
1/2
1/3
1/2
1/3
2/2
(IF B < 16)
(IF B > 15)
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