PC87338 Datasheet, PDF (203/221 Pages) National Semiconductor (TI) – ACPI 1.0 and PC98/99 Compliant SuperI/O

8.4 SWITCHING CHARACTERISTICS
All the timing specifications given in this section refer to 0.8V and 2.0V on all the signals as illustrated in Figure
90, unless specifically stated otherwise.
2.4
2.0
2.0
0.8
Test Points
0.8
0.4
FIGURE 90. Testing Specification Standard
8.4.1 Timing Table
T_A = 0°C to 70°C, V_DD = 5V +/- 10% or 3.3V +/- 10%, V_SS = 0V
Symbol Figure
CLOCK TIMING
C_FREQ
Parameter
Clock Frequency
14.318 MHz Nominal
24 MHz Nominal
48 MHz Nominal
t_CH
Figure 91 Clock High Pulse
14.318 MHz Nominal
Width
24 MHz Nominal
48 MHz Nominal
t_CL
Figure 91 Clock Low Pulse
Width
14.318 MHz Nominal
24 MHz Nominal
48 MHz Nominal
CPU ACCESS TIMING
t_AR
Figure 92 Address Valid to Read Active
t_AW
Figure 93 Address Valid to Write Active
t_AES Figures 92, AEN Signal Setup
93
t_AEH Figures 92, AEN Signal Hold
93
t_DH
t_DS
t_HZ
t_RA
t_RRV
t_RD
t_RDH
t_RDV
t_WA
t_WRV
t_WR
t_RI
t_WI
RC
WR
Figure 93
Figure 93
Figure 92
Figure 92
Figure 92
Figure 92
Figure 92
Figure 92
Figure 93
Figure 93
Figure 93
Figure 92
Figure 93
Figure 92
Figure 93
Data Hold
Data Setup
Data Bus Floating From Read Inactive
Address Hold from Read Inactive
Read Cycle Recovery
Read Strobe Width
Read Data Hold
Data Valid From Read Active
Address Hold from Write Inactive
Write Cycle Recovery
Write Strobe Width
IRQn Reset Delay from Read Inactive
IRQn Reset Delay from Write Inactive
Read Cycle Time (RC > t_AR + t_RD + t_RRV)
Write Cycle Time (WR > t_AW + t_WR+ t_WRV)
Min
Max
Unit
14.318
- 100 ppm
24 -100 ppm
48 -100 ppm
26
16
16
8
8
8
14.318 MHz
+ 100 ppm
24+100 ppm MHz
48+100 ppm MHz
ns
ns
ns
ns
ns
ns
15
ns
15
ns
15
ns
5
ns
2
ns
18
ns
25
ns
1
ns
45
ns
60
1000
ns
10
ns
55
ns
1
ns
45
ns
60
1000
ns
60
ns
60
ns
123
ns
123
ns
203
www.national.com