COP87LXXCJ Datasheet, PDF (15/28 Pages) National Semiconductor (TI) – 8-Bit CMOS OTP Microcontrollers with 4k or 32k Memory and Comparator

Modulator/Timer (Continued)
DS012529-17
DS012529-18
FIGURE 14. Mode 2b: Variable Duty Cycle Output
Comparator
The device has one differential comparator. Ports L0–L2 are
used for the comparator. The output of the comparator is
brought out to a pin. Port L has the following assignments:
L0 Comparator output
L1 Comparator negative input
L2 Comparator positive input
(CMPEN = 1, CMPOE=X)
CMPOE Enables comparator output to pin L0
(“1”=enable), CMPEN bit must be set to enable
this function. If CMPEN=0, L0 will be 0.
The Comparator Select/Control bits are cleared on RESET
(the comparator is disabled). To save power the program
should also disable the comparator before the device enters
the HALT mode.
THE COMPARATOR STATUS/CONTROL BITS
These bits reside in the CNTRL2 Register (Address 0CC)
CMPEN Enables comparator (“1” = enable)
CMPRD Reads comparator output internally
The user program must set up L0, L1 and L2 ports correctly
for comparator Inputs/Output: L1 and L2 need to be config-
ured as inputs and L0 as output. Table 8 shows the DC and
AC characteristics for the comparator.
TABLE 8. DC and AC Characteristics (Note 8) 4.5V ≤ V_CC ≤ 5.5V, −40˚C ≤ T_A ≤ +85˚C
Parameters
Input Offset Voltage
Input Common Mode Voltage Range
Voltage Gain
DC Supply Current (when enabled)
Response Time
Conditions
0.4V < V_IN < V_CC −1.5V
V_CC = 5.5V
TBD mV Step,
TBD mV Overdrive, 100 pF Load
Note 8: For comparator output current characteristics see L-Port specs.
Min
Typ
±10
0.4
300k
Max
±25
V_CC −1.5
250
1
Units
mV
V
V/V
µA
µs
Multi-Input Wake Up
The Multi-Input Wakeup feature is used to return (wakeup)
the device from the HALT mode. Figure 15 shows the
Multi-Input Wakeup logic.
This feature utilizes the L Port. The user selects which par-
ticular L port bit or combination of L Port bits will cause the
device to exit the HALT mode. Three 8-bit memory mapped
registers, Reg:WKEN, Reg:WKEDG, and Reg:WKPND are
used in conjunction with the L port to implement the
Multi-Input Wakeup feature.
All three registers Reg:WKEN, Reg:WKPND, and Reg-
:WKEDG are read/write registers, and are cleared at reset,
except WKPND. WKPND is unknown on reset.
The user can select whether the trigger condition on the se-
lected L Port pin is going to be either a positive edge (low to
high transition) or a negative edge (high to low transition).
15
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