COP87LXXCJ Datasheet, PDF (11/28 Pages) National Semiconductor (TI) – 8-Bit CMOS OTP Microcontrollers with 4k or 32k Memory and Comparator

Timer/Counter
The device has a powerful 16-bit timer with an associated
16-bit register enabling it to perform extensive timer func-
tions. The timer T1 and its register R1 are each organized as
two 8-bit read/write registers. Control bits in the register
CNTRL allow the timer to be started and stopped under soft-
ware control. The timer-register pair can be operated in one
of three possible modes. Table 5 details various timer oper-
ating modes and their requisite control settings.
TABLE 5. Timer Operating Modes
CNTRL
Bits
765
000
001
010
011
100
101
110
111
Operation Mode
External Counter w/Auto-Load Reg.
External Counter w/Auto-Load Reg.
Not Allowed
Not Allowed
Timer w/Auto-Load Reg.
Timer w/Auto-Load Reg./Toggle TIO Out
Timer w/Capture Register
Timer w/Capture Register
T Interrupt
Timer Underflow
Timer Underflow
Not Allowed
Not Allowed
Timer Underflow
Timer Underflow
TIO Pos. Edge
TIO Neg. Edge
Timer
Counter
On
TIO Pos. Edge
TIO Neg. Edge
Not Allowed
Not Allowed
t_c
t_c
t_c
t_c
MODE 1. TIMER WITH AUTO-LOAD REGISTER
In this mode of operation, the timer T1 counts down at the in-
struction cycle rate. Upon underflow the value in the register
R1 gets automatically reloaded into the timer which contin-
ues to count down. The timer underflow can be programmed
to interrupt the microcontroller. A bit in the control register
CNTRL enables the TIO (G3) pin to toggle upon timer under-
flows. This allows the generation of square-wave outputs or
pulse width modulated outputs under software control (Fig-
ure 8).
MODE 2. EXTERNAL COUNTER
In this mode, the timer T1 becomes a 16-bit external event
counter. The counter counts down upon an edge on the TIO
pin. Control bits in the register CNTRL program the counter
to decrement either on a positive edge or on a negative
edge. Upon underflow the contents of the register R1 are au-
tomatically copied into the counter. The underflow can also
be programmed to generate an interrupt (Figure 8).
as a positive edge or as a negative edge. In this mode the
user can elect to be interrupted on the specified trigger edge
(Figure 9).
DS012529-11
FIGURE 9. Timer Capture Mode Block Diagram
TIMER PWM APPLICATION
Figure 10 shows how a minimal component D/A converter
can be built out of the Timer-Register pair in the Auto-Reload
mode. The timer is placed in the “Timer with auto reload”
mode and the TIO pin is selected as the timer output. At the
outset the TIO pin is set high, the timer T1 holds the on time
and the register R1 holds the signal off time. Setting TRUN
bit starts the timer which counts down at the instruction cycle
rate. The underflow toggles the TIO output and copies the off
time into the timer, which continues to run. By alternately
loading in the on time and the off time at each successive in-
terrupt a PWM frequency can be easily generated.
DS012529-9
FIGURE 8. Timer/Counter Auto
Reload Mode Block Diagram
MODE 3. TIMER WITH CAPTURE REGISTER
Timer T1 can be used to precisely measure external fre-
quencies or events in this mode of operation. The timer T1
counts down at the instruction cycle rate. Upon the occur-
rence of a specified edge on the TIO pin the contents of the
timer T1 are copied into the register R1. Bits in the control
register CNTRL allow the trigger edge to be specified either
11
DS012529-12
FIGURE 10. Timer Application
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