COPC912C Datasheet, PDF (14/24 Pages) National Semiconductor (TI) – COP912C/COP912CH 8-Bit Microcontroller

Instruction Set (Continued)
TABLE VII Instruction Set
ADD
ADC
SUBC
AND
OR
XOR
IFEQ
IFGT
IFBNE
DRSZ
SBIT
RBIT
IFBIT
X
LD
LD
LD
X
X
LD
LD
LD
CLRA
INC
DEC
LAID
DCOR
RRC
SWAP
SC
RC
IFC
IFNC
JMPL
JMP
Instr
A MemI
A MemI
A MemI
A MemI
A MemI
A MemI
A MemI
A MemI
Reg
Mem
Mem
Mem
A Mem
A MemI
Mem Imm
Reg Imm
A Bg
A Xg
A Bg
A Xg
Bg Imm
A
A
A
A
A
JP
JSRL
JSR
JID
RET
RETSK
Addr
Addr
Disp
Addr
Addr
RETI
INTR
NOP
Function
Add
Add with Carry
Subtract with Carry
Logical AND
Logical OR
Logical Exclusive-OR
IF Equal
IF Greater than
IF B not Equal
Decrement Reg Skip if Zero
Set Bit
Reset Bit
If Bit
Exchange A with Memory
Load A with Memory
Load Direct Memory Immed
Load Register Memory Immed
Exchange A with Memory B
Exchange A with Memory X
Load A with Memory B
Load A with Memory X
Load Memory Immediate
Clear A
Increment A
Decrement A
Load A Indirect from ROM
Decimal Correct A
Rotate Right Through Carry
Swap Nibbles of A
Set C
Reset C
If C
If Not C
Jump Absolute Long
Jump Absolute
Jump Relative Short
Jump Subroutine Long
Jump Subroutine
Jump Indirect
Return from Subroutine
Return and Skip
Return from Interrupt
Generate an Interrupt
No Operation
Register Operation
w A A a MemI
w w A A a MemI a C C Carry
w w A A b MemI a C C Carry
w A A and MemI
w A A or MemI
w A A xor MemI
Compare A and MemI Do Next if A e MemI
Compare A and MemI Do Next if A ^l MemI
Do Next If Lower 4 Bits of B not e Imm
w Reg Reg - 1 Skip if Reg Goes to Zero
1 to Mem Bit (Bit e 0 to 7 Immediate)
0 to Mem Bit (Bit e 0 to 7 Immediate)
If Mem Bit is True Do Next Instruction
A
Mem
AwMemI
MemwImm
RegwImm
A
w B (B Bg1)
A
w X (X Xg1)
Aw B w (B Bg1)
Aw X w (X Xg1)
B wImm w (B Bg1)
Aw0
AwA a 1
AwA b 1
w A ROM(PU A)
w A BCD Correction (follows ADC SUBC)
CxA7x xA0xC
A7 A4
A3 A0
Cw1
Cw0
If C is True do Next Instruction
If C is not True do Next Instruction
w PC ii (ii e 15 Bits 0k to 32k)
w PC11 PC0 i (i e 12 Bits)
PC15 PC12 Remain Unchanged
w PC PC a r (r is b31 to a32 not 1)
SP wPL w w SPb1 PU SPb2 PC ii
w w w SP PL SPb1 PU SPb2 PC11 PC0 ii
w PL ROM(PU A)
w w SPa2 PL SP PU SPb1
w w SPa2 PL SP PU SPb1
Skip next Instr
w SPa2 PL SP PUw SPb1 GIEw1
SP wPL w w SPb1 PU SPb2 PC 0FF
PCwPCa1
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