UPD784218 Datasheet, PDF (9/92 Pages) NEC – 16-/8-BIT SINGLE-CHIP MICROCONTROLLERS

µPD784218, 784218Y
3. MAJOR DIFFERENCES FROM µPD78078, 78078Y SUBSERIES
Item
Series Name
µPD784218, 784218Y Subseries
CPU
16-bit CPU
Minimum instruction With main
execution time
system clock
160 ns (@ 12.5 MHz operation)
With subsystem
clock
61 µs (@ 32.768 kHz operation)
Memory space
1 MB
I/O ports
Total
86
CMOS input
8
CMOS I/O
72
N-ch open-drain I/O 6
Pins with ancillary Pins with pull-up
70
functions^{Note 1}
resistor
LED direct drive
22
outputs
Middle-voltage pins 6
Timer/counters
• 16-bit timer/event counter × 1 unit
• 8-bit timer/event counter × 6 units
Serial interfaces
• UART/IOE (3-wire serial I/O)
× 2 channels
• CSI (3-wire serial I/O, multi-master
supporting I²C bus^{Note 2})
× 1 channel
Interrupts
NMI pin
Provided
Macro service
Provided
Context switching Provided
Programmable priority 4 levels
Standby function
HALT/STOP/IDLE modes
In low-power consumption mode:
HALT/IDLE modes
ROM correction
Provided
External access status function
Provided
Package
• 100-pin plastic LQFP (fine pitch)
(14 × 14 mm)
• 100-pin plastic QFP (14 × 20 mm)
µPD78078, 78078Y Subseries
8-bit CPU
400 ns (@ 5.0 MHz operation)
122 µs (@ 32.768 kHz operation)
64 KB
88
2
78
8
86
16
8
• 16-bit timer/event counter × 1 unit
• 8-bit timer/event counter × 4 units
• UART/IOE (3-wire serial I/O)
× 1 channel
• CSI (3-wire serial I/O, 2-wire serial
I/O, I²C bus^{Note 3}) × 1 channel
• CSI (3-wire serial I/O, 3-wire serial
I/O with automatic transmit/receive
function) × 1 channel
None
None
None
None
HALT/STOP modes
None
None
• 100-pin plastic LQFP (fine pitch)
(14 × 14 mm)
• 100-pin plastic QFP (14 × 20 mm)
• 100-pin ceramic WQFN
(14 × 20 mm) (µPD78P078 and
78P078Y only)
Notes 1. The pins with ancillary functions are included in the I/O pins.
2. µPD784218Y Subseries only
3. µPD78078Y Subseries only
Data Sheet U12304EJ2V0DS00
9