UPD784218 Datasheet, PDF (46/92 Pages) NEC – 16-/8-BIT SINGLE-CHIP MICROCONTROLLERS

µPD784218, 784218Y
9. INTERRUPT FUNCTION
The three types of servicing in response to an interrupt request shown in Table 9-1 can be selected by program.
Table 9-1. Servicing of Interrupt Request
Servicing Mode
Vectored interrupt
Context switching
Macro service
Servicing Means
Software
Firmware
Servicing
Branches and executes servicing routine
(servicing is arbitrary)
Automatically switches register bank,
branches and executes servicing routine
(servicing is arbitrary)
Executes data transfer between memory
and I/O (servicing is fixed)
Contents of PC and PSW
Saves to and restores
from stack
Saves to or restores from
fixed area in register bank
Retained
9.1 Interrupt Sources
Table 9-2 shows the interrupt sources available. As shown, interrupts are generated by 29 sources, execution
of the BRK instruction, BRKCS instruction, or an operand error.
The priority of interrupt servicing can be set to four levels, so that nesting can be controlled during interrupt
servicing, and so that which of the two or more interrupts that simultaneously occur should be serviced first can be
decided. When the macro service function is used, however, nesting always proceeds (i.e., is not held pending).
The default priority is the priority (fixed) of the service that is performed if two or more interrupt requests, having
the same priority, are simultaneously generated (refer to Table 9-2).
Table 9-2. Interrupt Sources (1/2)
Type
Software
Default
Priority
—
Name
BRK instruction
BRKCS instruction
Operand error
Non-maskable
Maskable
—
0 (highest)
1
2
3
4
5
6
7
8
9
NMI
INTWDT
INTWDTM
INTP0
INTP1
INTP2
INTP3
INTP4
INTP5
INTP6
INTIIC0
INTCSI0
INTSER1
Source
Trigger
Internal/
External
Instruction execution
—
Instruction execution
If result of exclusive OR between operands
byte and byte is not FFH when MOV STBC,
#byte instruction, MOV WDM, #byte instruction,
or LOCATION instruction is executed
Pin input edge detection
External
Overflow of watchdog timer
Internal
Overflow of watchdog timer
Internal
Pin input edge detection
External
End of I²C bus transfer by CSI0
End of 3-wire transfer by CSI0
Occurrence of UART reception error in ASI1
Internal
Macro
Service
—
—
√
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Data Sheet U12304EJ2V0DS00