UPD784218 Datasheet, PDF (48/92 Pages) NEC – 16-/8-BIT SINGLE-CHIP MICROCONTROLLERS

µPD784218, 784218Y
9.2 Vectored Interrupt
Execution branches to a servicing routine by using the memory contents of a vector table address corresponding
to the interrupt source as the address of the branch destination.
So that the CPU performs interrupt servicing, the following operations are performed:
• On branching: Saves the status of the CPU (contents of PC and PSW) to stack
• On returning: Restores the status of the CPU (contents of PC and PSW) from stack
To return to the main routine from an interrupt service routine, the RETI instruction is used.
The branch destination address is in a range of 0 to FFFFH.
Table 9-3. Vector Table Address
Interrupt Source
BRK instruction
TRAP0 (operand error)
NMI
INTWDT (non-maskable)
INTWDTM (maskable)
INTP0
INTP1
INTP2
INTP3
INTP4
INTP5
INTP6
INTIIC0
INTCSI0
INTSER0
INTSR1
INTCSI1
Vector Table Address
003EH
003CH
0002H
0004H
0006H
0008H
000AH
000CH
000EH
0010H
0012H
0014H
0016H
0018H
001AH
Interrupt Source
INTST1
INTSER2
INSR2
INTCSI2
INTST2
INTTM3
INTTM00
INTTM01
INTTM1
INTTM2
INTAD
INTTM5
INTTM6
INTTM7
INTTM8
INTWT
INTKR
Vector Table Address
001CH
001EH
0020H
0022H
0024H
0026H
0028H
002AH
002CH
002EH
0030H
0032H
0034H
0036H
0038H
003AH
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Data Sheet U12304EJ2V0DS00