UPD784907 Datasheet, PDF (81/98 Pages) NEC – 16-BIT SINGLE-CHIP MICROCONTROLLER

µPD784907, 784908
A/D Converter Characteristics (TA = –40 to +85°C, VDD = AVDD = AVREF1 = 3.5 to 5.5 V, VSS = AVSS = 0 V)
Parameter
Symbol
Conditions
Resolution
Total error^Note
IEAD = 00H
FR = 1
IEAD = 01H
VDD = 4.5 to 5.5 V
Quantization error
Conversion time
tCONV
FR = 1 120/fCLK
FR = 0 240/fCLK
Sampling time
tSAMP
FR = 1 18/fCLK
FR = 0 36/fCLK
Analog input impedance RAN
AVREF1 impedance
RREF1
AVDD power supply current AIDD1
CS = 1
AIDD2
CS = 0, STOP mode
MIN.
TYP.
MAX.
Unit
8
bit
0.6
%
1.5
%
1
2.2
%
±1/2
LSB
9.5
480
µs
19.1
960
µs
1.4
72
µs
2.9
144
µs
1,000
MΩ
3
10
kΩ
2.0
5.0
mA
1.0
20
µA
Note Quantization error is not included. This parameter is indicated as the ratio to the full-scale value.
Caution To execute the conversion by the A/D converter set port 7, multiplexed with the A/D input lines,
to output mode to prevent data from being inverted.
Remark fCLK: system clock frequency (selectable from fXX, fXX/2, fXX/4, and fXX/8 by the standby control register
(STBC))
IEBus Controller Characteristics (TA = –40 to +85°C, VDD = AVDD = AVREF1 = 4.5 to 5.5 V, AVSS = VSS = 0 V)
Parameter
Symbol
Conditions
IEBus standard
frequency^{Note 1}
fS
Transfer speed: mode 1
Driver delay time (from tDTX
TX output to bus line)^{Note 2}
CL = 50 pF^{Note 3}
Receiver delay time (from tDRX
bus line to RX input)^{Note 2}
Transmission delay on
bus^{Note 2}
tDBUS
MIN.
6.20
TYP.
6.29
MAX.
6.39
1.5
0.7
0.85
Unit
MHz
µs
µs
µs
Notes 1. The value conforms to the IEBus standard. The IEBus controller is operable within the range of the
oscillator frequency of oscillator characteristics.
2. IEBus system clock: The value is measured when fX = 6.29 MHz.
3. C is the load capacitance of TX output line.
Data Sheet U11680EJ2V0DS00
81