UPD784907 Datasheet, PDF (35/98 Pages) NEC – 16-BIT SINGLE-CHIP MICROCONTROLLER

µPD784907, 784908
8.2 Clock Generator
A circuit for generating the clock signal required for operation is provided. The clock generator has a frequency
divider. If high-speed operation is not necessary, the internal operating frequency can be lowered by the frequency
divider to reduce the current consumption.
Figure 8-2. Block Diagram of Clock Generator
X1
Oscillator
X2
Clock-synchronized 3-wire serial I/O (CSI)
Asynchronous serial I/O (UART/IOE)
INTP0 noise eliminator
Oscillation settling timer
Timer/counter
STBC.4, 5
fXX
fXX/8
1/2
1/2
1/2
fXX/4
fCLK
fXX/2
CPU
Peripheral circuits
STBC.7
1
0
Operation clock of the IEBus controller^Note
Watch clock
Main clock
Watch timer
Note Set bit 7 of the standby control register (STBC) to 1.
Remark fXX: Oscillator frequency or external clock input frequency
fCLK: Internal operating frequency
INTW interrupt signal
Data Sheet U11680EJ2V0DS00
35