UPD78361A Datasheet, PDF (60/88 Pages) NEC – 16/8-BIT SINGLE-CHIP MICROCONTROLLER

µPD78361A, 78362A
Mnemonic
Operand
CALL !addr16
CALLF !addr11
CALLT [addr5]
CALL
rp1
[rp1]
BRK
RET
RETB
RETI
sfrp
PUSH
post
PSW
PUSHU post
sfrp
POP
post
PSW
POPU post
MOVW
INCW
DECW
SP, #word
SP, AX
AX, SP
SP
SP
Byte
Operation
Flag
S Z AC P/V CY
(SP – 1) ← (PC + 3)H, (SP – 2) ← (PC + 3)L,
3 _{PC ← addr16, SP ← SP – 2}
(SP – 1) ← (PC + 2)H, (SP – 2) ← (PC + 2)L,
2 _{PC15 – 11 ← 00001, PC10 – 0 ← addr11, SP ← SP – 2}
(SP – 1) ← (PC + 1)H, (SP – 2) ← (PC + 1)L,
1 PCH ← (TPF, 00000000, addr5 + 1),
PCL ← (TPF, 00000000, addr5 ), SP ← SP – 2
2
(SP – 1) ← (PC + 2)H, (SP – 2) ← (PC + 2)L,
PCH ← rp1H, PCL ← rp1L, SP ← SP – 2
(SP – 1) ← (PC + 2)H, (SP – 2) ← (PC + 2)L,
2 _{PCH ← (rp1 + 1), PCL ← (rp1), SP ← SP – 2}
(SP – 1) ← PSWH, (SP – 2) ← PSWL
1 ^{(SP – 3) ← (PC + 1)H, (SP – 4) ← (PC + 1)L,}
PCL ← (003EH), PCH ← (003FH), SP ← SP –
4, IE ← 0
1 PCL ← (SP), PCH ← (SP + 1), SP ← SP + 2
PCL ← (SP), PCH ← (SP +1)
1 PSWL ← (SP + 2), PSWH ← (SP + 3)
SP ← SP + 4
RRRRR
PCL ← (SP), PCH ← (SP + 1)
1 PSWL ← (SP + 2), PSWH ← (SP + 3)
SP ← SP + 4
RRRRR
(SP – 1) ← sfrH
3 (SP – 2) ← sfrL
SP ← SP – 2
2 ^{{(SP – 1) ← postH, (SP – 2) ← postL, SP ← SP}
– 2} × n times
1 (SP – 1) ← PSWH, (SP – 2) ← PSWL, SP ← SP – 2
2 ^{{(UP – 1) ← postH, (UP – 2) ← postL, UP ← UP}
– 2} × n times
sfrL ← (SP)
3 sfrH ← (SP + 1)
SP ← SP + 2
2 ^{{postL ← (SP), postH ← (SP + 1), SP ← SP + 2}}
× n times
1 PSWL ← (SP), PSWH ← (SP + 1), SP ← SP + 2 R R R R R
2 ^{{postL ← (UP), postH ← (UP + 1), UP ← UP +}
2} × n times
4 SP ← word
2 SP ← AX
2 AX ← SP
2 SP ← SP + 1
2 SP ← SP – 1
Remark n of the stack manipulation instruction is the number of registers described as post.
60