UPD78361A Datasheet, PDF (43/88 Pages) NEC – 16/8-BIT SINGLE-CHIP MICROCONTROLLER

µPD78361A, 78362A
4. INTERRUPT FUNCTIONS
4.1 OUTLINE
The µPD78362A is provided with powerful interrupt functions that can service interrupt requests from the
internal hardware peripherals and external sources. In addition, the following three interrupt service modes are
available. In addition, four levels of interrupt priority can be specified.
• Vectored interrupt service
• Macro service
• Context switching
Table 4-1. Interrupt Sources
Type Note
Name
Interrupt source
Trigger
Source unit
Vector
table
address
Macro Context
service switching
Non-
–
maskable _–
NMI
INTWDT
NMI pin input
Watchdog timer
External
WDT
0002H
0004H
None
None
0
INTOV3 Overflow of timer 3
RPU
0006H
1 INTP0/INTCC30 INTP0 pin input/CC30 coincidence signal External/RPU 0008H
2
INTP1
INTP1 pin input
3
INTP2
INTP2 pin input
External
000AH
000CH
4 INTP3/INTCC20 INTP3 pin input/CC20 coincidence signal External/RPU 000EH
5
INTP4
INTP4 pin input
External
0010H
6
INTTM0 Underflow of timer 0
0012H
7
Maskable
8
INTCM03
INTCM10
CM03 coincidence signal
CM10 coincidence signal
RPU
0014H
0016H
Provided Provided
9 INTCM40 CM40 coincidence signal
0018H
10 INTCM41 CM41 coincidence signal
001AH
11 INTSER Receive error of UART
001CH
12
INTSR
End of UART reception
13
INTST
End of UART transfer
UART
001EH
0020H
14
15
–
Software
–
Exception –
Reset –
INTCSI
INTAD
BRK
BRKCS
TRAP
RESET
End of CSI transfer/reception
End of A/D conversion
BRK instruction
BRKCS instruction
Illegal op code trap
Reset input
CSI
0022H
A/D
0024H
–
003EH
None
–
–
Provided
None
–
003CH
None
–
0000H
Note Default priority : Priority that takes precedence when two or more maskable interrupts occur at the
same time. 0 is the highest priority, and 15 is the lowest.
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