UPD78361A Datasheet, PDF (40/88 Pages) NEC – 16/8-BIT SINGLE-CHIP MICROCONTROLLER

µPD78361A, 78362A
Figure 3-16. Block Diagram of Clocked Serial Interface
8
CSIM CTXE CRXE WUP MOD2 MOD1 MOD0 CLS1 CLS0
SI/SB1
SO/SB0
MOD1
MOD2
MOD1
MOD2
SCK
Internal bus
8
7
0
Shift register (SIO)
8
SBIC BSYE ACKD ACKE ACKT CMDD RELD CMDT RELT
RELT
CMDT
SO latch
DQ
MOD1
Bus release/
command/
acknowledge
detector
circuit
Serial
clock
counter
Serial clock
control circuit
Busy/
acknow-
ledge
detector
circuit
WUP
Interrupt
signal
generation
control
circuit
CLS0
CLS1
INTCSI
Baud rate
1/2
generator (BRG)
fCLK/8
fCLK/32
Figure 3-17. Block Diagram of Baud Rate Generator
Internal bus
7
0
BRG
—12 ^Coincidence
Clear
TMBRG
Serial interface
7
0
BRGC
Prescaler
fCLK/2
40