English
Language : 

DRQ-12-50-L48 Datasheet, PDF (17/26 Pages) Murata Power Solutions Inc. – 600W Digital Fully Regulated Intermediate DC-DC Bus Converter
◁
PMBus Addressing
Figure 2 and the accompanying table display the recommended resistor values
for hard-wiring PMBus addresses (1% tolerance resistors recommended): The
address is set in the form of two octal (0 to 7) digits, with each pin setting one
digit. The resistor values for each digit is shown below.
The SA0 and SA1 pins can be configured with a resistor to GND according to
the following equation.
PMBus Address = 8 x (SA0value) + (SA1 value)
If the calculated PMBus address is 0d, 11d or 12d, PMBus address 119d is
assigned instead. From a system point of view, the user shall also be aware of
further limitations of the addresses as stated in the PMBus Specification. It is
not recommended to keep the SA0 and SA1 pins left open.
PMBus Commands
The products are designed to be PMBus compliant. The following tables list
the implemented PMBus read commands. For more detailed information see
“PMBus Power System Management Protocol Specification, Part I – General
Requirements, Transport and Electrical Interface” and “PMBus Power System
Management Protocol, Part II – Command Language.”
OVERALL
CMD
Command Name
01h
OPERATION2
02h
ON_OFF_CONFIG3
03h
CLEAR_FAULTS
10h
WRITE_PROTECT
11h
STORE_DEFAULT_ALL4
12h
RESTORE_DEFAULT_ALL4
15h
STORE_USER_ALL4
16h
RESTORE_USER_ALL4
19h
CAPABILITY
20h
VOUT_MODE
21h
VOUT_COMMAND
22h
VOUT_TRIM
25h
VOUT_MARGIN_HIGH
26h
VOUT_MARGIN_LOW
28h
VOUT_DROOP
40h
VOUT_OV_FAULT_LIMIT
41h
VOUT_OV_FAULT_RESPONSE5
42h
VOUT_OV_WARN_LIMIT
46h
IOUT_OC_FAULT_LIMIT
47h
IOUT_OC_FAULT_RESPONSE6
4Ah
IOUT_OC_WARN_LIMIT
4Fh
OT_FAULT_LIMIT
50h
OT_FAULT_RESPONSE5
51h
OT_WARN_LIMIT
55h
VIN_OV_FAULT_LIMIT
56h
VIN_OV_FAULT_RESPONSE7
57h
VIN_OV_WARN_LIMIT
58h
VIN_UV_WARN_LIMIT
59h
VIN_UV_FAULT_LIMIT
5Ah
VIN_UV_FAULT_RESPONSE7
www.murata-ps.com/support
SMBus
Transaction
Type:
Writing
Data
Write Byte
Write Byte
Send byte
Write Byte
Send byte
Send byte
Send byte
Send byte
N/A
N/A
Write Word
Write Word
Write Word
Write Word
Write Word12
Write Word
Write Byte
Write Word
Write Word
Write Byte
Write Word
Write Word
Write Byte
Write Word
Write Word
Write Byte
Write Word
Write Word
Write Word
Write Byte
SMBus
Transaction
Type:
Reading
Data
Read Byte
Read Byte
N/A
Read Byte
N/A
N/A
N/A
N/A
Read Byte
Read Byte
Read Word
Read Word
Read Word
Read Word
Read Word
Read Word
Read Byte
Read Word
Read Word
Read Byte
Read Word
Read Word
Read Byte
Read Word
Read Word
Read Byte
Read Word
Read Word
Read Word
Read Byte
DRQ-12/50-L48 Series
600W Digital Fully Regulated
Intermediate DC-DC Bus Converter
SA0
SA1
R1
R0
Figure 2. Schematic of Connection of Address Resistors
Digit (SA0, SA1 index)
0
1
2
3
4
5
6
7
Resistor Value [kΩ]
10
22
33
47
68
100
150
220
Number
of Data Default Value
Bytes
Lower
Limit
Upper
Limit
Cross check
Unit
1
0x80
1
0x1D
0
N/A
1
0x00
0
N/A
0
N/A
0
N/A
0
N/A
1
0xB0
1
0x17
2
12.000
8.100 13.200
V
2
0
8.1<=Vout<=13.215
V
2
13.199
8.100 13.199 >VOUT_MARGIN_LOW
V
2
8.100
8.100 13.200 <VOUT_MARGIN_HIGH
V
2
0/1213
0
100
Vout>=8.100
mΩ
2
14.199
8.100 15.600 >VOUT_OV_WARN_LIMIT
V
1
0xB8
2
13.500
8.100 15.600
<VOUT_OV_FAULT_LIMIT
>VOUT_COMMAND
V
2
59.00
0.00 65.00 >IOUT_OC_WARN_LIMIT
A
1
0xF8
2
56.00
0.00 65.00 <IOUT_OC_FAULT_LIMIT
A
2
135
30 145
>OT_WARN_LIMIT
°C
1
0xB8
2
115
30 145
<OT_FAULT_LIMIT
°C
2
66.50
32.00 110.00 >VIN_OV_WARN_LIMIT
V
1
0xF8
2
64.50
32.00 110.00
<VIN_OV_FAULT_LIMIT
>VIN_UV_WARN_LIMIT
V
2
42.00
32.00 75.00
<VIN_OV_WARN_LIMIT
>VIN_UV_FAULT_LIMIT
V
2
40.00
32.00 75.00 <VIN_UV_WARN_LIMIT
V
1
0xF8
MDC_DRQ-12/50-L48NK.B02 Page 17 of 26
 ▷