MC68HC11KA4TS Datasheet, PDF (58/68 Pages) Motorola, Inc – 8-Bit Microcontroller

PACTL —Pulse Accumulator Control
Bit 7
6
5
4
3
—
PAEN PAMOD PEDGE
—
RESET:
0
0
0
0
0
Bit 7 — Not implemented
Always reads zero
PAEN — Pulse Accumulator System Enable
Refer to 11 Pulse Accumulator.
PAMOD — Pulse Accumulator Mode
Refer to 11 Pulse Accumulator.
PEDGE — Pulse Accumulator Edge Control
Refer to 11 Pulse Accumulator.
Bit 3 — Not implemented
Always reads zero
I4/O5 — Input Capture 4/Output Compare 5
Configure TI4/O5 for input capture or output compare
0 = OC5 enabled
1 = IC4 enabled
RTR[1:0] — Real-Time Interrupt (RTI) Rate
Refer to 10.1 Real-Time Interrupt.
2
I4/O5
0
1
RTR1
0
$0026
Bit 0
RTR0
0
10.1 Real-Time Interrupt
The real-time interrupt (RTI) function can generate interrupts at different fixed periodic rates. These
rates are a function of the MCU oscillator frequency and the value of the software-accessible control
bits, RTR1 and RTR0. These bits determine the rate at which interrupts are requested by the RTI sys-
tem. The RTI system is driven by an E divided by 2¹³ rate clock compensated so that it is independent
of the timer prescaler. The RTR1 and RTR0 control bits select an additional division factor. RTI is set
to its fastest rate by default out of reset and can be changed at any time. Refer to interrupt enable and
flag bits in TMSK2 and TFLG2 registers.
RTR [1:0]
00
01
10
11
Table 11 Real-Time Interrupt Rates
Divide
E By
2¹³
2¹⁴
2¹⁵
2¹⁶
E=
XTAL =
8.0 MHz
4.096 ms
8.192 ms
16.384 ms
32.768 ms
2.0 MHz
XTAL =
12.0 MHz
2.731 ms
5.461 ms
10.923 ms
21.845 ms
3.0 MHz
XTAL =
16.0 MHz
2.048 ms
4.096 ms
8.192 ms
16.384 ms
4.0 MHz
MOTOROLA
58
MC68HC11KA4
MC68HC11KA4TS/D