MC68HC11KA4TS Datasheet, PDF (43/68 Pages) Motorola, Inc – 8-Bit Microcontroller

FE — Framing Error
FE is set when a zero is detected where a stop bit was expected. Clear the FE flag by reading SCSR1
with FE set and then reading SCDR.
0 = Stop bit detected
1 = Zero detected
PF — Parity Error Flag
PF is set if received data has incorrect parity. Clear PF by reading SCSR1 with PE set and then reading
SCDR.
0 = Parity correct
1 = Incorrect parity detected
SCSR2 —SCI Status Register 2
$0075
Bit 7
6
5
4
3
2
1
Bit 0
—
—
—
—
—
—
—
RAF
RESET:
0
0
0
0
0
0
0
0
Bits [7:1] — Not implemented
Always read zero
RAF — Receiver Active Flag (Read only)
0 = A character is not being received
1 = A character is being received
SCDRH/L —SCI Data Register High/Low
$0076, $0077
$0076
$0077
Bit 7
R8
R7/T7
6
T8
R6/T6
5
—
R5/T5
4
—
R4/T4
3
—
R3/T3
2
—
R2/T2
1
—
R1/T1
Bit 0
—
R0/T0
SCDRH (High)
SCDRL (Low)
R8 — Receiver Bit 8
Ninth serial data bit received when SCI is configured for a nine data bit operation.
T8 — Transmitter Bit 8
Ninth serial data bit transmitted when SCI is configured for a nine data bit operation.
Bits [5:0] — Not implemented
Always read zero
R/T[7:0] — Receiver/Transmitter Data Bits [7:0]
SCI data is double buffered in both directions.
MC68HC11KA4
MC68HC11KA4TS/D
MOTOROLA
43