MMC2080 Datasheet, PDF (11/34 Pages) Motorola, Inc – Integrated Processor with Roaming FLEX Decoder

MMC2080/2075 Pin Descriptions
13 12 11 10 9 8 7 6 5 4 3 2 1
VDD
I/O
CLKOUT* LOBAT*
S2 *
VSS
Core
VSS
I/O
SEL1
VDD
I/O
MPB0/ MPB2/
COL0 COL2
EB1
MPB5/
ROW1
VSS
I/O
A
EXTS1* MLDY
VSS
I/O
S1*
S4*
S7*
SEL0
VDD
Core
EB0
ABORT
BW8
MPB6/ MPB7/
ROW2 ROW3
B
VSS
I/O
VDD
I/O
EXTS0* SYMCLK
S3*
S6* SEL2
TA
MPB1/
COL1
MPB3/
COL3
MPB4/
ROW0
MPA0
IRQ
C
MPE3/
MOSI
VDD
Core
MPE4/
LOCK
S0/IFIN
XBOOT
S5*
SEL3
WE
OE
VSS
Core
MPA1
D0
VDD
Core
D
VSS
OSC
XTAL
EXTAL
VDD
OSC
D1
D2
VSS
I/O
BUSCLK
E
A21
VSS
PLL
CXFC
VDD
PLL
VDD
I/O
MPA2 MPA3
VDD
I/O
F
VSS
Core
A18
A19
A20
D4
D3 MPA4 MPA5
G
BREQ
VDD
I/O
A17
A16
VDD
I/O
D9
D8
VSS
I/O
H
A15
VSS MPE2/ MPE1/
I/O MISO SS
BGNT D10
D5
VSS
Core
J
A14
A13
MPE0/
SCLK
A12
A8
VDD MPC5/ MPC0/
Core UCTS TOC0
A1
TDI
VDD
Core
D12
D11
K
A11
VDD
I/O
VSS
I/O
A10
VDD MPC6/
I/O UTXD
A5
MPC3/ VSS
TIC1 Core
TDO
D13
D7
D6
L
UCLK
VDD
I/O
RSTOUT
TEST
A7
MPC7/
URXD
A3
MPC2/
TOC1
A2
TRST
VSS
I/O
D15
D14
M
VSS
I/O
RESET
DE
A9
A6
MPC4/
URTS
A4
VSS MPC1/
I/O TIC0
A0
TMS
TCK
VDD
I/O
N
Bottom View
* Signal available only in 2080
Figure 4. MMC2080/2075 BGA (144-Pin) Bottom View
Signal and Connection Descriptions
11
Preliminary