MMC2080 Datasheet, PDF (10/34 Pages) Motorola, Inc – Integrated Processor with Roaming FLEX Decoder

MMC2080/2075 Pin Descriptions
1 2 3 4 5 6 7 8 9 10 11 12 13
A
VSS MPB5/
I/O ROW1
EB1
MPB2/ MPB0/
COL2 COL0
VDD
I/O
SEL1
VSS
I/O
VSS
Core
S2*
LOBAT* CLKOUT*
VDD
I/O
B
MPB7/ MPB6/
ROW3 ROW2
BW8
ABORT
EB0
VDD
Core
SEL0
S7*
S4*
S1*
VSS
I/O
MLDY EXTS1*
C
IRQ
MPA0
MPB4/
ROW0
MPB3/
COL3
MPB1/
COL1
TA
SEL2 S6*
S3*
SYMCLK EXTS0*
VDD
I/O
VSS
I/O
D
VDD
Core
D0
MPA1
VSS
Core
OE
WE
SEL3
S5*
XBOOT
S0/IFIN
MPE4/
LOCK
VDD
Core
MPE3/
MOSI
E
BUSCLK
VSS
I/O
D2
D1
VDD
OSC
EXTAL
XTAL
VSS
OSC
F
VDD
I/O
MPA3 MPA2
VDD
I/O
VDD
PLL
CXFC
VSS
PLL
A21
G
MPA5 MPA4 D3
D4
A20
A19
A18
VSS
Core
H
VSS
I/O
D8
D9
VDD
I/O
A16
A17
VDD
I/O
BREQ
J
VSS
Core
D5
D10 BGNT
MPE1/ MPE2/ VSS
SS MISO I/O
A15
K
D11
D12
VDD
Core
TDI
A1
MPC0/ MPC5/ VDD
TOC0 UCTS Core
A8
A12
MPE0/
SCLK
A13
A14
L
D6
D7
D13
TDO
VSS MPC3/
Core TIC1
A5
MPC6/ VDD
UTXD I/O
A10
VSS
I/O
VDD
I/O
A11
M
D14
D15
VSS
I/O
TRST
A2
MPC2/
TOC1
A3
MPC7/
URXD
A7
TEST
RSTOUT
VDD
I/O
UCLK
N
VDD
I/O
TCK
TMS
A0
MPC1/ VSS
TIC0 I/O
A4
MPC4/
URTS
A6
A9
DE
RESET
VSS
I/O
Top View
* Signal available only in 2080
Figure 3. MMC2080/2075 BGA (144-Pin) Top View
10
MMC2080/2075 Technical Data
Preliminary