|
MC88915TFN55 Datasheet, PDF (10/20 Pages) Motorola, Inc – LOW SKEW CMOS PLL CLOCK DRIVER | |||
|
◁ |
MC88915TFN55/70/100/133/160
MC88915TFN160
SYNC INPUT TIMING REQUIREMENTS
Symbol
Parameter
Minimum
Maximum Unit
tRISE/FALL,SYNC Inputs
tCYCLE, SYNC Inputs
Duty Cycle SYNC Inputs
Rise/Fall Time, SYNC Inputs From 0.8 to 2.0V
Input Clock Period SYNC Inputs
Input Duty Cycle SYNC Inputs
â
3.0
ns
12.5
100
ns
50% ±25%
1. These tCYCLE minimum values are valid when âQâ output is fed back and connected to the FEEDBACK pin. This is the configuration shown
in Figure 5b.
2. Information in Table 1 and in Note 3 of the AC specification notes describe this specification and its limits depending on what output is fed back,
and if FREQ_SEL is high or low.
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
(Voltages Referenced to GND) TA =0° C to +70° C, VCC = 5.0 V ± 5%
Test Conditions
VCC
V
Target Limit
Unit
VIH
Minimum HighâLevel Input
Voltage
Vout = 0.1 V or VCC â 0.1 V
4.75
2.0
V
5.25
2.0
VIL
Maximum LowâLevel Input
Voltage
Vout = 0.1 V or VCC â 0.1 V
4.75
0.8
V
5.25
0.8
VOH
Minimum HighâLevel Output
Voltage
Vin = VIH or VIL
IOH = â36 mA 1
4.75
4.01
V
5.25
4.51
VOL
Maximum LowâLevel Output
Voltage
Vin = VIH or VIL
IOL = 36 mA 1
4.75
0.44
V
5.25
0.44
Iin
ICCT
IOLD
Maximum Input Leakage Current
Maximum ICC/Input
Minimum Dynamic Output Current 3
VI = VCC or GND
VI = VCC â 2.1 V
VOLD = 1.0V Max
5.25
±1.0
µA
5.25
2.0 2
mA
5.25
88
mA
IOHD
VOHD = 3.85V Min
5.25
â88
mA
ICC
Maximum Quiescent Supply
Current (per Package)
VI = VCC or GND
5.25
1.0
mA
IOZ
Maximum 3âState Leakage Current
VI = VIH or VIL;VO = VCC or GND 5.25
±50 4
µA
1. IOL and IOH are 12mA and â12mA respectively for the LOCK output.
2. The PLL_EN input pin is not guaranteed to meet this specification.
3. Maximum test duration is 2.0ms, one output loaded at a time.
4. Specification value for IOZ is preliminary, will be finalized upon âMCâ status.
CAPACITANCE AND POWER SPECIFICATIONS
Symbol
Parameter
Typical Values Unit
Conditions
CIN
CPD
PD1
Input Capacitance
Power Dissipation Capacitance
Power Dissipation @ 50MHz with 50⦠Thevenin Termination
4.5
pF
40
pF
15mW/Output
mW
120mW/Device
VCC = 5.0 V
VCC = 5.0 V
VCC = 5.0 V
T = 25°C
PD2
Power Dissipation @ 50MHz with 50⦠Parallel Termination to GND
57mW/Output
mW
VCC = 5.0 V
456mW/Device
T = 25° C
NOTE: PD1 and PD2 mW/Output numbers are for a âQâ output.
FREQUENCY SPECIFICATIONS (TA =0° C to +70° C, VCC = 5.0 V ±5%)
Guaranteed Minimum
Symbol
fmax 1
Parameter
Maximum Operating Frequency (2X_Q Output)
Maximum Operating Frequency (Q0âQ4,Q5 Output)
TFN160
160
80
Unit
MHz
MHz
1. Maximum Operating Frequency is guaranteed with the part in a phaseâlocked condition, and all outputs loaded with 50⦠terminated to VCC/2.
MOTOROLA
10
TIMING SOLUTIONS
BR1333 â Rev 6
|
▷ |