MT47H64M16BT-37EA Datasheet, PDF (75/134 Pages) Micron Technology – DDR2 SDRAM

1Gb: x4, x8, x16 DDR2 SDRAM
Commands
READ with auto The READ with auto precharge enabled or WRITE with auto pre-
precharge enabled/ charge enabled states can each be broken into two parts: the
WRITE with auto access period and the precharge period. For READ with auto pre-
precharge enabled: charge, the precharge period is defined as if the same burst was
executed with auto precharge disabled and then followed with
the earliest possible PRECHARGE command that still accesses all
of the data in the burst. For WRITE with auto precharge, the pre-
charge period begins when ^tWR ends, with ^tWR measured as if
auto precharge was disabled. The access period starts with regis-
tration of the command and ends where the precharge period
(or ^tRP) begins. This device supports concurrent auto precharge
such that when a READ with auto precharge is enabled or a
WRITE with auto precharge is enabled, any command to other
banks is allowed, as long as that command does not interrupt
the read or write data transfer already in process. In either case,
all other related limitations apply (contention between read da-
ta and write data must be avoided).
The minimum delay from a READ or WRITE command with auto precharge enabled to
a command to a different bank is summarized in Table 40 (page 75).
4. REFRESH and LOAD MODE commands may only be issued when all banks are idle.
5. Not used.
6. All states and sequences not shown are illegal or reserved.
7. READs or WRITEs listed in the Command/Action column include READs or WRITEs with
auto precharge enabled and READs or WRITEs with auto precharge disabled.
8. A WRITE command may be applied after the completion of the READ burst.
9. Requires appropriate DM.
10. The number of clock cycles required to meet ^tWTR is either two or ^tWTR/^tCK, whichever
is greater.
Table 40: Minimum Delay with Auto Precharge Enabled
From Command (Bank n)
WRITE with auto precharge
READ with auto precharge
To Command (Bank m)
READ or READ with auto precharge
WRITE or WRITE with auto precharge
PRECHARGE or ACTIVATE
READ or READ with auto precharge
WRITE or WRITE with auto precharge
PRECHARGE or ACTIVATE
Minimum Delay
(with Concurrent Auto Precharge)
(CL - 1) + (BL/2) + ^tWTR
(BL/2)
1
(BL/2)
(BL/2) + 2
1
Units
t_CK
t_CK
t_CK
t_CK
t_CK
t_CK
DESELECT
The DESELECT function (CS# HIGH) prevents new commands from being executed by
the DDR2 SDRAM. The DDR2 SDRAM is effectively deselected. Operations already in
progress are not affected. DESELECT is also referred to as COMMAND INHIBIT.
PDF: 09005aef821ae8bf
1GbDDR2.pdf – Rev. V 6/10 EN
75
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