MT47H64M16BT-37EA Datasheet, PDF (121/134 Pages) Micron Technology – DDR2 SDRAM

1Gb: x4, x8, x16 DDR2 SDRAM
Power-Down Mode
Figure 70: READ-to-Power-Down or Self Refresh Entry
CK#
CK
Command
CKE
Address
A10
DQS, DQS#
DQ
T0
T1
T2
T3
T4
T5
T6
T7
READ
NOP
NOP
NOP
Valid
Valid
NOP1
tCKE _(MIN)
Valid
RL = 3
DO DO
DO
DO
Power-down2 or
self refresh entry
Transitioning Data
Don’t Care
Notes: 1. In the example shown, READ burst completes at T5; earliest power-down or self refresh
entry is at T6.
2. Power-down or self refresh entry may occur after the READ burst completes.
Figure 71: READ with Auto Precharge-to-Power-Down or Self Refresh Entry
CK#
T0
T1
T2
T3
T4
T5
T6
T7
CK
Command
READ
NOP
NOP
NOP
Valid
Valid
NOP1
tCKE _(MIN)
CKE
Address
A10
DQS, DQS#
DQ
Valid
RL = 3
DO
DO
DO
DO
sePlofwreefrr-edsohw2 ^nenotrry
Transitioning Data
Don’t Care
Notes: 1. In the example shown, READ burst completes at T5; earliest power-down or self refresh
entry is at T6.
2. Power-down or self refresh entry may occur after the READ burst completes.
PDF: 09005aef821ae8bf
1GbDDR2.pdf – Rev. V 6/10 EN
121
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