MT47H64M16BT-37EA Datasheet, PDF (37/134 Pages) Micron Technology – DDR2 SDRAM

Table 12: AC Operating Specifications and Conditions (Continued)
Not all speed grades listed may be supported for this device; refer to the title page for speeds supported; Notes: 1–5 apply to the entire table;
V_DDQ = +1.8V ±0.1V, V_DD = +1.8V ±0.1V
AC Characteristics
-187E
-25E
-25
-3E
-3
-37E
-5E
Parameter
Symbol Min Max Min Max Min Max Min Max Min Max Min Max Min Max Units Notes
Input setup time
Input hold time
t_ISb
125
–
175 – 175 – 200 – 200 – 250 – 350 –
ps 31, 33
t_IHb
200
–
250 – 250 – 275 – 275 – 375 – 475 –
ps 31, 33
Input setup time
t_ISa
325
–
375 – 375 – 400 – 400 – 500 – 600 –
ps 31, 33
Input hold time
t_IHa
325
–
375 – 375 – 400 – 400 – 500 – 600 –
ps 31, 33
Input pulse width
t_IPW
0.6
–
0.6
–
0.6
–
0.6
–
0.6
–
0.6
–
0.6
– ^tCK 18, 32
ACTIVATE-to-
ACTIVATE delay,
same bank
t_RC
54
–
55
–
55
–
54
–
55
–
55
–
55
–
ns 18, 34
ACTIVATE-to-READ ^tRCD 13.125 –
12.5 –
15
–
12
–
15
–
15
–
15
–
ns
18
or WRITE delay
ACTIVATE-to-
PRECHARGE delay
t_RAS
40 70K 40 70K 40 70K 40 70K 40 70K 40 70K 40 70K ns 18, 34,
35
PRECHARGE period ^tRP 13.125 –
12.5 –
15
–
12
–
15
–
15
–
15
–
ns 18, 36
PRE-
<1Gb ^tRPA 13.125 –
12.5 –
15
–
12
–
15
–
15
–
15
–
ns 18, 36
CHARGE _≥1Gb t_RPA
15
–
15
– 17.5
15
ALL period
18
18.75
20
ns 18, 36
ACTIVATE x4, x8 ^tRRD
7.5
–
7.5 – 7.5 – 7.5 – 7.5 – 7.5 – 7.5 – ns 18, 37
-to-
x16
t_RRD
10
–
10
–
10
–
10
–
10
–
10
–
10
–
ns 18, 37
ACTIVATE
delay
different
bank
4-bank
x4, x8 ^tFAW
35
–
35
–
35
– 37.5 – 37.5 – 37.5 – 37.5 –
ns 18, 38
activate
x16
t_FAW
45
–
45
–
45
–
50
–
50
–
50
–
50
–
ns 18, 38
period
(≥1Gb)