MT40A1G8WE-083EAAT Datasheet, PDF (38/358 Pages) Micron Technology – Automotive DDR4 SDRAM

8Gb: x8, x16 Automotive DDR4 SDRAM
Programming Mode Registers
The mode register contents can be changed using the same command and timing re-
quirements during normal operation as long as the device is in idle state; that is, all
banks are in the precharged state with ^tRP satisfied, all data bursts are completed, and
CKE is HIGH prior to writing into the mode register. If the R_TT(NOM) feature is enabled in
the mode register prior to and/or after an MRS command, the ODT signal must contin-
uously be registered LOW, ensuring R_TT is in an off state prior to the MRS command.
The ODT signal may be registered HIGH after ^tMOD has expired. If the R_TT(NOM) feature
is disabled in the mode register prior to and after an MRS command, the ODT signal
can be registered either LOW or HIGH before, during, and after the MRS command. The
mode registers are divided into various fields depending on functionality and modes.
In some mode register setting cases, function updating takes longer than ^tMOD. This
type of MRS does not apply ^tMOD timing to the next valid command, excluding DES.
These MRS command input cases have unique MR setting procedures, so refer to indi-
vidual function descriptions.
CCMTD-1406124318-10419
8gb_auto_ddr4_dram.pdf - Rev. C 3/17 EN
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