MT41J256M8 Datasheet, PDF (171/211 Pages) Micron Technology – MT41J512M4 – 64 Meg x 4 x 8 Banks

Figure 86: Nonconsecutive WRITE to WRITE
T0
T1
CK#
CK
Command
WRITE
NOP
Address
Valid
DQS, DQS#
DQ
DM
T2
T3
T4
T5
T6
NOP
NOP
NOP
WRITE
NOP
Valid
WL = CWL + AL = 7
T7
T8
T9
T10
T11
NOP
NOP
NOP
NOP
NOP
WL = CWL + AL = 7
DI DI
DI
DI
DI
DI
DI
DI
n n+1 n+2 n+3 n+4 n+5 n+6 n+7
T12
T13
T14
T15
T16
NOP
NOP
NOP
NOP
NOP
DI
DI
DI
DI
DI DI
DI
DI
b b+1 b+2 b+3 b+4 b+5 b+6 b+7
Transitioning Data
Notes:
1. DI n (or b) = data-in for column n (or column b).
2. Seven subsequent elements of data-in are applied in the programmed order following DO n.
3. Each WRITE command may be to any bank.
4. Shown for WL = 7 (CWL = 7, AL = 0).
T17
NOP
Don't Care
Figure 87: WRITE (BL8) to READ (BL8)
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
Ta0
CK#
CK
Command¹
WRITE
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
READ
t_WTR2
Address³
Valid
DQS, DQS#
DQ⁴
t_WPRE
t_WPST
Valid
WL = 5
DI
DI
DI
DI
DI
DI
DI
DI
n
n+1 n+2 n+3 n+4 n+5 n+6 n+7
Indicates break
in time scale
Transitioning Data
Don’t Care
Notes:
1. NOP commands are shown for ease of illustration; other commands may be valid at these times.
2. ^tWTR controls the WRITE-to-READ delay to the same device and starts with the first rising clock edge after the last
write data shown at T9.
3. The BL8 setting is activated by either MR0[1:0] = 00 or MR0[1:0] = 01 and MR0[12] = 1 during the WRITE command
at T0. The READ command at Ta0 can be either BC4 or BL8, depending on MR0[1:0] and the A12 status at Ta0.
4. DI n = data-in for column n.
5. RL = 5 (AL = 0, CL = 5), WL = 5 (AL = 0, CWL = 5).