MT41J256M8 Datasheet, PDF (104/211 Pages) Micron Technology – MT41J512M4 – 64 Meg x 4 x 8 Banks

2Gb: x4, x8, x16 DDR3 SDRAM
Data Setup, Hold, and Derating
Data Setup, Hold, and Derating
The total ^tDS (setup time) and ^tDH (hold time) required is calculated by adding the data
sheet ^tDS (base) and ^tDH (base) values (see Table 64 (page 104); values come from Ta-
ble 56 (page 76)) to the Δ^tDS and Δ^tDH derating values (see Table 65 (page 105)), re-
spectively. Example: ^tDS (total setup time) = ^tDS (base) + Δ^tDS. For a valid transition, the
input signal has to remain above/below V_IH(AC)/V_IL(AC) for some time ^tVAC (see Table 69
(page 108)).
Although the total setup time for slow slew rates might be negative (for example, a valid
input signal will not have reached V_IH(AC)/V_IL(AC)) at the time of the rising clock transi-
tion), a valid input signal is still required to complete the transition and to reach
V_IH/V_IL(AC). For slew rates that fall between the values listed in Table 66 (page 105), the
derating values may obtained by linear interpolation.
Setup (^tDS) nominal slew rate for a rising signal is defined as the slew rate between the
last crossing of V_REF(DC) and the first crossing of V_IH(AC)min. Setup (^tDS) nominal slew
rate for a falling signal is defined as the slew rate between the last crossing of V_REF(DC)
and the first crossing of V_IL(AC)max. If the actual signal is always earlier than the nominal
slew rate line between the shaded V_REF(DC)-to-AC region, use the nominal slew rate for
derating value (see Figure 36 (page 109)). If the actual signal is later than the nominal
slew rate line anywhere between the shaded V_REF(DC)-to-AC region, the slew rate of a
tangent line to the actual signal from the AC level to the DC level is used for derating
value (see Figure 38 (page 111)).
Hold (^tDH) nominal slew rate for a rising signal is defined as the slew rate between the
last crossing of V_IL(DC)max and the first crossing of V_REF(DC). Hold (^tDH) nominal slew
rate for a falling signal is defined as the slew rate between the last crossing of V_IH(DC)min
and the first crossing of V_REF(DC). If the actual signal is always later than the nominal
slew rate line between the shaded DC-to-V_REF(DC) region, use the nominal slew rate for
derating value (see Figure 37 (page 110)). If the actual signal is earlier than the nominal
slew rate line anywhere between the shaded DC-to-V_REF(DC) region, the slew rate of a
tangent line to the actual signal from the DC-to-V_REF(DC) region is used for derating val-
ue (see Figure 39 (page 112)).
Table 64: DDR3 Data Setup and Hold Values at 1 V/ns (DQS, DQS# at 2 V/ns) – AC/DC-Based
Symbol
800
t_{DS (base) AC175}
75
t_{DS (base) AC150}
125
t_{DS (base) AC135}
165
t_{DH (base) DC100}
150
Slew Rate Referenced
1
1066
25
75
115
100
1
1333
–
30
60
65
1
1600
–
10
40
45
1
1866
–
–
68
70
2
2133
–
–
53
55
2
Unit
ps
ps
ps
ps
V/ns
Reference
V_IH(AC)/V_IL(AC)
V_IH(AC)/V_IL(AC)
V_IH(AC)/V_IL(AC)
V_IH(DC)/V_IL(DC)
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf - Rev. Q 04/13 EN
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