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MT40A512M8RH-075E Datasheet, PDF (160/365 Pages) Micron Technology – DDR4 SDRAM
4Gb: x4, x8, x16 DDR4 SDRAM
Power-Down Mode
Figure 99: Power-Down Entry/Exit Clarifications – Case 1
T0
T1
T2
Ta0
Ta1
Tb0
Tb1
Tb2
CK_c
CK_t
Command
Valid
CKE
tIH
Address
DES
tIS
DES
DES
tPD
tIH
tIS
Valid
tCPDED
DES
tCKE
DES
tIS
DES
tPD
tCPDED
Enter
power-down
mode
Exit
power-down
mode
Enter
power-down
mode
Time Break
Don’t Care
Power-Down Entry, Exit Timing with CAL
Command/Address latency is used and additional timing restrictions are required when
entering power-down, as noted in the following figures.
Figure 100: Active Power-Down Entry and Exit Timing with CAL
7
7
7D
7D
7D
7E
7E
7F
7F
&.BF
&.BW
&6BQ
7G
7G
7H
&RPPDQG
'(6
'(6
9DOLG
'(6
'(6
'(6
'(6
'(6
'(6
'(6
9DOLG
$GGUHVV
&.(
W&$/
9DOLG
W,+
W,6
W&3'('
W3'
W;3
W,+
W,6
W&$/
9DOLG
7LPH%UHDN
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09005aef84af6dd0
4gb_ddr4_dram.pdf - Rev. G 1/17 EN
160
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