MT40A512M8RH-075E Datasheet, PDF (159/365 Pages) Micron Technology – DDR4 SDRAM

4Gb: x4, x8, x16 DDR4 SDRAM
Power-Down Mode
Figure 97: PRECHARGE/PRECHARGE ALL Command to Power-Down Entry
T0
CK_c
CK_t
Command
Address
CKE
T1
T2
Ta0
Tb0
Tb1
PRE or
PREA
DES
DES
DES
Valid
t_IS
t_CPDED
t_PD
Valid
t_CKE
t_PREPDEN
Time Break
Don’t Care
Figure 98: MRS Command to Power-Down Entry
T0
T1
Ta0
Ta1
Tb0
Tb1
CK_c
CK_t
Command
MRS
DES
DES
DES
DES
Address
Valid
CKE
t_CPDED
t_IS
t_PD
t_CKE
t_MRSPDEN
Valid
Time Break
Don’t Care
Power-Down Clarifications – Case 1
When CKE is registered LOW for power-down entry, ^tPD (MIN) must be satisfied before
CKE can be registered HIGH for power-down exit. The minimum value of parameter
t_{PD (MIN) is equal to the minimum value of parameter} t_{CKE (MIN) as shown in the}
Timing Parameters by Speed Bin table. A detailed example of Case 1 follows.
09005aef84af6dd0
4gb_ddr4_dram.pdf - Rev. G 1/17 EN
159
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