MT29F8G08ADADAH4D Datasheet, PDF (106/132 Pages) Micron Technology – 4Gb, 8Gb, 16Gb: x8, x16 NAND Flash Memory Features

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4Gb, 8Gb, 16Gb: x8, x16 NAND Flash Memory
Interleaved Die (Multi-LUN) Operations
Interleaved Die (Multi-LUN) Operations
In devices that have more than one die (LUN) per target, it is possible to improve per-
formance by interleaving operations between the die (LUNs). An interleaved die (multi-
LUN) operation is one that is issued to an idle die (LUN) (RDY = 1) while another die
(LUN) is busy (RDY = 0).
Interleaved die (multi-LUN) operations are prohibited following RESET (FFh), identifi-
cation (90h, ECh, EDh), and configuration (EEh, EFh) operations until ARDY =1 for all of
the die (LUNs) on the target.
During an interleaved die (multi-LUN) operation, there are two methods to determine
operation completion. The R/B# signal indicates when all of the die (LUNs) have finish-
ed their operations. R/B# remains LOW while any die (LUN) is busy. When R/B# goes
HIGH, all of the die (LUNs) are idle and the operations are complete. Alternatively, the
READ STATUS ENHANCED (78h) command can report the status of each die (LUN) in-
dividually.
If a die (LUN) is performing a cache operation, like PROGRAM PAGE CACHE (80h-15h),
then the die (LUN) is able to accept the data for another cache operation when status
register bit 6 is 1. All operations, including cache operations, are complete on a die
when status register bit 5 is 1.
During and following interleaved die (multi-LUN) operations, the READ STATUS (70h)
command is prohibited. Instead, use the READ STATUS ENHANCED (78h) command to
monitor status. This command selects which die (LUN) will report status. When two-
plane commands are used with interleaved die (multi-LUN) operations, the two-plane
commands must also meet the requirements in Two-Plane Operations.
See Command Definitions for the list of commands that can be issued while other die
(LUNs) are busy.
During an interleaved die (multi-LUN) operation that involves a PROGRAM series
(80h-10h, 80h-15h) operation and a READ operation, the PROGRAM series operation
must be issued before the READ series operation. The data from the READ series opera-
tion must be output to the host before the next PROGRAM series operation is issued.
This is because the 80h command clears the cache register contents of all cache regis-
ters on all planes.
PDF: 09005aef83b25735
m60a_4gb_8gb_16gb_ecc_nand.pdf - Rev. N 10/12 EN
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