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| PIC24FJ256GB106-I Datasheet, PDF (83/328 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG) | |||
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PIC24FJ256GB110 FAMILY
REGISTER 6-12: IEC1: INTERRUPT ENABLE CONTROL REGISTER 1
R/W-0
U2TXIE
bit 15
R/W-0
U2RXIE
R/W-0
INT2IE(1)
R/W-0
T5IE
R/W-0
T4IE
R/W-0
OC4IE
R/W-0
OC3IE
U-0
â
bit 8
R/W-0
IC8IE
bit 7
R/W-0
IC7IE
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
â
INT1IE(1)
CNIE
CMIE
MI2C1IE
SI2C1IE
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
U2TXIE: UART2 Transmitter Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U2RXIE: UART2 Receiver Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
INT2IE: External Interrupt 2 Enable bit(1)
1 = Interrupt request enabled
0 = Interrupt request not enabled
T5IE: Timer5 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T4IE: Timer4 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
OC4IE: Output Compare Channel 4 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
OC3IE: Output Compare Channel 3 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as â0â
IC8IE: Input Capture Channel 8 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
IC7IE: Input Capture Channel 7 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as â0â
INT1IE: External Interrupt 1 Enable bit(1)
1 = Interrupt request enabled
0 = Interrupt request not enabled
CNIE: Input Change Notification Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
CMIE: Comparator Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Note 1: If an external interrupt is enabled, the interrupt input must also be configured to an available RPx or PRIx
pin. See Section 9.4 âPeripheral Pin Selectâ for more information.
© 2008 Microchip Technology Inc.
Preliminary
DS39897B-page 81
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