PIC24FJ256GB106-I Datasheet, PDF (119/328 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)

PIC24FJ256GB110 FAMILY
7.5.1
CONSIDERATIONS FOR USB
OPERATION
When using the USB On-The-Go module in
PIC24FJ256GB110 family devices, users must always
observe these rules in configuring the system clock:
• For USB operation, the selected clock source
(EC, HS or XT) must meet the USB clock
tolerance requirements.
• The Primary Oscillator/PLL modes are the only
oscillator configurations that permit USB opera-
tion. There is no provision to provide a separate
external clock source to the USB module.
• While the FRCPLL Oscillator mode is available in
these devices, it should never be used for USB
applications. FRCPLL mode is still available when
the application is not using the USB module. How-
ever, the user must always ensure that the FRC
source is configured to provide a frequency of
4 MHz or 8 MHz (RCDIV2:RCDIV0 = 001 or
000), and that the USB PLL prescaler is
configured appropriately.
• All other oscillator modes are available; however,
USB operation is not possible when these modes
are selected. They may still be useful in cases
where other power levels of operation are
desirable and the USB module is not needed (e.g.,
the application is sleeping and waiting for bus
attachment).
7.6 Reference Clock Output
In addition to the CLKO output (FOSC/2) available in
certain oscillator modes, the device clock in the
PIC24FJ256GB110 family devices can also be config-
ured to provide a reference clock output signal to a port
pin. This feature is available in all oscillator configura-
tions and allows the user to select a greater range of
clock submultiples to drive external devices in the
application.
This reference clock output is controlled by the
REFOCON register (Register 7-4). Setting the ROEN
bit (REFOCON<15>) makes the clock signal available
on the REFO pin. The RODIV bits (REFOCON<11:8>)
enable the selection of 16 different clock divider
options.
The ROSSLP and ROSEL bits (REFOCON<13:12>)
control the availability of the reference output during
Sleep mode. The ROSEL bit determines if the oscillator
on OSC1 and OSC2, or the current system clock
source, is used for the reference clock output. The
ROSSLP bit determines if the reference source is
available on REFO when the device is in Sleep mode.
To use the reference clock output in Sleep mode, both
the ROSSLP and ROSEL bits must be set. The device
clock must also be configured for one of the primary
modes (EC, HS or XT); otherwise, if the POSCEN bit is
not also set, the oscillator on OSC1 and OSC2 will be
powered down when the device enters Sleep mode.
Clearing the ROSEL bit allows the reference output
frequency to change as the system clock changes
during any clock switches.
© 2008 Microchip Technology Inc.
Preliminary
DS39897B-page 117