PIC16F684T-E Datasheet, PDF(80/192 Page) Microchip Technology – 14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

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PIC16F684T-E Datasheet, PDF (80/192 Pages) Microchip Technology – 14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

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PIC16F684

10.5 Protection Against Spurious Write

There are conditions when the user may not want to

write to the data EEPROM memory. To protect against

spurious EEPROM writes, various mechanisms have

been built in. On power-up, WREN is cleared. Also, the

Power-up Timer (64 ms duration) prevents

EEPROM write.

The write initiate sequence and the WREN bit together

help prevent an accidental write during:

â¢ Brown-out

â¢ Power Glitch

â¢ Software Malfunction

10.6 Data EEPROM Operation During

Code-Protect

Data memory can be code-protected by programming

the CPD bit in the Configuration Word register

(Register 12-1) to â0â.

When the data memory is code-protected, the CPU is

able to read and write data to the data EEPROM. It is

recommended to code-protect the program memory

when code-protecting data memory. This prevents

anyone from programming zeroes over the existing

code (which will execute as NOPs) to reach an added

routine, programmed in unused program memory,

which outputs the contents of data memory.

Programming unused locations in program memory to

â0â will also help prevent data memory code protection

from becoming breached.

TABLE 10-1: SUMMARY OF ASSOCIATED DATA EEPROM REGISTERS

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on:

POR, BOR

Value on

all other

Resets

INTCON

GIE

PEIE

T0IE

INTE

RAIE

T0IF

INTF

RAIF 0000 0000 0000 0000

PIR1

EEIF

ADIF CCP1IF C2IF

C1IF OSFIF TMR2IF TMR1IF 0000 0000 0000 0000

PIE1

EEIE

ADIE CCP1IE C2IE

C1IE OSFIE TMR2IE TMR1IE 0000 0000 0000 0000

EEDAT

EEDAT7 EEDAT6 EEDAT5 EEDAT4 EEDAT3 EEDAT2 EEDAT1 EEDAT0 0000 0000 0000 0000

EEADR EEADR7 EEADR6 EEADR5 EEADR4 EEADR3 EEADR2 EEADR1 EEADR0 0000 0000 0000 0000

EECON1

EECON2(1) EEPROM Control Register 2

â WRERR WREN WR

RD ---- x000 ---- q000

---- ---- ---- ----

Legend:

Note 1:

x = unknown, u = unchanged, â = unimplemented read as â0â, q = value depends upon condition. Shaded cells are not used by the Data

EEPROM module.

EECON2 is not a physical register.

DS41202F-page 78

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