PIC16F684T-E Datasheet, PDF (10/192 Pages) Microchip Technology – 14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F684
2.2.1
GENERAL PURPOSE REGISTER
FILE
The register file is organized as 128 x 8 in the
PIC16F684. Each register is accessed, either directly
or indirectly, through the File Select Register (FSR)
(see Section 2.4 “Indirect Addressing, INDF and
FSR Registers”).
2.2.2 SPECIAL FUNCTION REGISTERS
The Special Function Registers are registers used by
the CPU and peripheral functions for controlling the
desired operation of the device (see Table 2-1). These
registers are static RAM.
The special registers can be classified into two sets:
core and peripheral. The Special Function Registers
associated with the “core” are described in this section.
Those related to the operation of the peripheral features
are described in the section of that peripheral feature.
FIGURE 2-2:
DATA MEMORY MAP OF
THE PIC16F684
Indirect Addr.⁽¹⁾
TMR0
PCL
STATUS
FSR
PORTA
PORTC
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
TMR2
T2CON
CCPR1L
CCPR1H
CCP1CON
PWM1CON
ECCPAS
WDTCON
CMCON0
CMCON1
ADRESH
ADCON0
File
Address
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
General
Purpose
Registers
File
Address
Indirect Addr.⁽¹⁾
80h
OPTION_REG
81h
PCL
82h
STATUS
83h
FSR
84h
TRISA
85h
86h
TRISC
87h
88h
89h
PCLATH
8Ah
INTCON
8Bh
PIE1
8Ch
8Dh
PCON
8Eh
OSCCON
8Fh
OSCTUNE
90h
ANSEL
91h
PR2
92h
93h
94h
WPUA
95h
IOCA
96h
97h
VRCON
EEDAT
EEADR
EECON1
EECON2⁽¹⁾
ADRESL
ADCON1
General
Purpose
Registers
32 Bytes
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
A0h
BFh
96 Bytes
Bank 0
6Fh
70
Accesses 70h-7Fh ^F0h
7Fh
FFh
Bank 1
Unimplemented data memory locations, read as ‘0’.
Note 1: Not a physical register.
DS41202F-page 8
© 2007 Microchip Technology Inc.