PIC16F684T-E Datasheet, PDF (101/192 Pages) Microchip Technology – 14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F684
12.2 Calibration Bits
Brown-out Reset (BOR), Power-on Reset (POR) and
8 MHz internal oscillator (HFINTOSC) are factory cali-
brated. These calibration values are stored in fuses
located in the Calibration Word (2009h). The Calibra-
tion Word is not erased when using the specified bulk
erase sequence in the “PIC12F6XX/16F6XX Memory
Programming Specification” (DS41244) and thus, does
not require reprogramming.
12.3 Reset
The PIC16F684 differentiates between various kinds of
Reset:
a) Power-on Reset (POR)
b) WDT Reset during normal operation
c) WDT Reset during Sleep
d) MCLR Reset during normal operation
e) MCLR Reset during Sleep
f) Brown-out Reset (BOR)
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Reset (BOR)
WDT wake-up does not cause register resets in the
same manner as a WDT Reset since wake-up is
viewed as the resumption of normal operation. TO and
PD bits are set or cleared differently in different Reset
situations, as indicated in Table 12-2. Software can use
these bits to determine the nature of the Reset. See
Table 12-4 for a full description of Reset states of all
registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 12-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 15.0 “Electrical
Specifications” for pulse-width specifications.
FIGURE 12-1:
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
External
Reset
MCLR/VPP pin
VDD
SLEEP
WDT
Module
WDT
Time-out
Reset
VDD Rise
Detect
Power-on Reset
Brown-out⁽¹⁾
Reset
BOREN
SBOREN
OSC1/
CLKI pin
OST/PWRT
OST
10-bit Ripple Counter
PWRT
LFINTOSC
11-bit Ripple Counter
S
Chip_Reset
R
Q
Note 1: Refer to the Configuration Word register (Register 12-1).
Enable PWRT
Enable OST
© 2007 Microchip Technology Inc.
DS41202F-page 99