PIC16F684T-E Datasheet, PDF (110/192 Pages) Microchip Technology – 14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F684
FIGURE 12-8:
INT PIN INTERRUPT TIMING
OSC1
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
CLKOUT ⁽³⁾
(4)
INT pin
INTF flag
(1)
(INTCON reg.)
(1)
(5)
GIE bit
(INTCON reg.)
Interrupt Latency ⁽²⁾
INSTRUCTION FLOW
PC
PC
Instruction
Fetched
Inst (PC)
PC + 1
Inst (PC + 1)
PC + 1
—
0004h
Inst (0004h)
0005h
Inst (0005h)
Instruction
Executed
Inst (PC – 1)
Inst (PC)
Dummy Cycle Dummy Cycle
Inst (0004h)
Note 1: INTF flag is sampled here (every Q1).
2: Asynchronous interrupt latency = 3-4 TCY. Synchronous latency = 3 TCY, where TCY = instruction cycle time. Latency
is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.
3: CLKOUT is available only in INTOSC and RC Oscillator modes.
4: For minimum width of INT pulse, refer to AC specifications in Section 15.0 “Electrical Specifications”.
5: INTF is enabled to be set any time during the Q4-Q1 cycles.
TABLE 12-6: SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPTS
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
Bit 0
Value on:
POR, BOR
Value on
all other
Resets
INTCON GIE PEIE T0IE INTE RAIE T0IF INTF
RAIF 0000 0000 0000 0000
IOCA
—
— IOCA5 IOCA4 IOCA3 IOCA2 IOCA1 IOCA0 --00 0000 --00 0000
PIR1
EEIF ADIF CCP1IF C2IF C1IF OSFIF TMR2IF TMR1IF 0000 0000 0000 0000
PIE1
EEIE ADIE CCP1IE C2IE C1IE OSFIE TMR2IE TMR1IE 0000 0000 0000 0000
Legend: x = unknown, u = unchanged, – = unimplemented read as ‘0’, q = value depends upon condition.
Shaded cells are not used by the interrupt module.
DS41202F-page 108
© 2007 Microchip Technology Inc.