PIC24FJ256GB210 Datasheet, PDF (68/386 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)

PIC24FJ256GB210 FAMILY
4.2.5 EXTENDED DATA SPACE (EDS)
The enhancement of the data space in
PIC24FJ256GB210 family devices has been
accomplished by a new technique, called the Extended
Data Space (EDS).
The EDS includes any additional internal extended
data memory not accessible by the lower 32 Kbytes of
data address space, any external memory through
EPMP and the Program Space Visibility (PSV).
The extended data space is always accessed through
the EDS window, which is the upper half of data space.
The entire extended data space is organized into EDS
FIGURE 4-4:
EXTENDED DATA SPACE
Special ^0x0000
Function
Registers
0x0800
pages, each having 32 Kbytes of data. Mapping of the
EDS page into the EDS window is done by using the
Data Space Read register (DSRPAG<9:0>) for read
operations and Data Space Write register
(DSWPAG<8:0>) for write operations. Figure 4-4
displays the entire EDS space.
Note:
Accessing Page 0 in the EDS window will
generate an address error trap as Page 0
is the base data memory (data locations,
0x0800 to 0x7FFF, in the lower data
space).
30 KB Data
Memory
EDS Space
0x8000 _0x008000
32 KB EDS
Window
Internal
Extended
Memory
0x018000
Internal
Extended
Memory
0x0187FE
0x018800
External
Memory
Access
using
EPMP
0xFF8000 0x000000 0x7F8000 ^0x000001
External
Memory
Access
using
EPMP
Program
Space
Access
Program
Space
Access
Program
Space
Access
0x7F8001
Program
Space
Access
0xFFFE 0x00FFFE
DSxPAG
= 0x001
0x01FFFE
DSxPAG
= 0x003
0xFFFFFE
DSx PAG
= 0x1FF
Extended SRAM (66 KB)
EPMP Memory Space
0x007FFE
DSRPAG
= 0x200
0x7FFFFE
DSRPAG
= 0x2FF
0x007FFF
DSRPAG
= 0x300
Program Memory
0x7FFFFF
DSRPAG
= 0x3FF
DS39975A-page 68
 2010 Microchip Technology Inc.