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PIC24FJ256GB210 Datasheet, PDF (63/386 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)
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TABLE 4-26: ENHANCED PARALLEL MASTER/SLAVE PORT REGISTER MAP
File
Name
Addr Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
PMCON1 0600 PMPEN
—
PSIDL ADRMUX1 ADRMUX0
—
MODE1
PMCON2 0602 BUSY
—
ERROR TIMEOUT
r
r
r
PMCON3 0604 PTWREN PTRDEN PTBE1EN PTBE0EN
—
AWAITM1 AWAITM0
PMCON4 0606 PTEN15 PTEN14 PTEN13 PTEN12 PTEN11 PTEN10 PTEN9
PMCS1CF 0608 CSDIS
CSP
CSPTEN
BEP
—
WRSP
RDSP
PMCS1BS 060A BASE23 BASE22 BASE21 BASE20 BASE19 BASE18 BASE17
PMCS1MD 060C ACKM1 ACKM0
r
r
r
—
—
PMCS2CF 060E CSDIS
CSP
CSPTEN
BEP
—
WRSP
RDSP
PMCS2BS 0610 BASE23 BASE22 BASE21 BASE20 BASE19 BASE18 BASE17
PMCS2MD 0612 ACKM1 ACKM0
r
r
r
—
—
PMDOUT1 0614
EPMP Data Out Register 1<15:8>
PMDOUT2 0616
EPMP Data Out Register 2<15:8>
PMDIN1 0618
EPMP Data In Register 1<15:8>
PMDIN2 061A
EPMP Data In Register 2<15:8>
PMSTAT 061C IBF
IBOV
—
—
IB3F
IB2F
IB1F
Legend:
— = unimplemented, read as ‘0’, r = Reserved. Reset values are shown in hexadecimal.
Note 1: Unimplemented in 64-pin devices, read as ‘0’.
MODE0
r
AWAITE
PTEN8
SM
BASE16
—
SM
BASE16
—
IB0F
CSF1
CSF0
ALP
ALMODE
—
BUSKEEP IRQM1 IRQM0
RADDR23 RADDR22 RADDR21 RADDR20 RADDR19 RADDR18 RADDR17 RADDR16
—
PTEN22(1) PTEN21(1) PTEN20(1) PTEN19(1) PTEN18(1) PTEN17(1) PTEN16(1)
PTEN7 PTEN6 PTEN5 PTEN4 PTEN3 PTEN2 PTEN1 PTEN0
ACKP
PTSZ1 PTSZ0
—
—
—
—
—
BASE15
—
—
—
BASE11
—
—
—
DWAITB1 DWAITB0 DWAITM3 DWAITM2 DWAITM1 DWAITM0 DWAITE1 DWAITE0
ACKP
PTSZ1 PTSZ0
—
—
—
—
—
BASE15
—
—
—
BASE11
—
—
—
DWAITB1 DWAITB0 DWAITM3 DWAITM2 DWAITM1 DWAITM0 DWAITE1 DWAITE0
EPMP Data Out Register 1<7:0>
EPMP Data Out Register 2<7:0>
EPMP Data In Register 1<7:0>
EPMP Data In Register 2<7:0>
OBE
OBUF
—
—
OB3E
OB2E
OB1E
OB0E
0000
0000
0000
0000
0000
0200
0000
0000
0600
0000
xxxx
xxxx
xxxx
xxxx
008F
TABLE 4-27: REAL-TIME CLOCK AND CALENDAR REGISTER MAP
File
Name
Addr Bit 15 Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
ALRMVAL
ALCFGRPT
RTCVAL
RCFGCAL
Legend:
Note 1:
0620
Alarm Value Register Window Based on ALRMPTR<1:0>
0622 ALRMEN CHIME AMASK3 AMASK2 AMASK1 AMASK0 ALRMPTR1 ALRMPTR0 ARPT7 ARPT6
0624
RTCC Value Register Window Based on RTCPTR<1:0>
0626 RTCEN
—
RTCWREN RTCSYNC HALFSEC RTCOE RTCPTR1 RTCPTR0 CAL7
CAL6
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
The status of the RCFGCAL register on POR is ‘0000’ and on other Resets is unchanged.
ARPT5
CAL5
Bit 4
ARPT4
CAL4
Bit 3
ARPT3
CAL3
Bit 2
ARPT2
CAL2
Bit 1
Bit 0
All
Resets
ARPT1
CAL1
ARPT0
xxxx
0000
xxxx
CAL0 (Note 1)
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