PIC24FJ256GB210 Datasheet, PDF (146/386 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)

PIC24FJ256GB210 FAMILY
8.5.2 USB CLOCK GENERATION
In the USB-On-The-Go module in the
PIC24FJ256GB210 family of devices, the primary
oscillator with the PLL block can be used as a valid
clock source for USB operation. The FRC oscillator
(implemented with ±1.0% accuracy) can be combined
with a PLL block, providing another option for a valid
USB clock source. There is no provision to provide a
separate external 48 MHz clock to the USB module.
The USB module sources its clock signal from a
96 MHz PLL. Due to the requirement that a 4 MHz input
must be provided to generate the 96 MHz signal, the
oscillator operation is limited to a range of possible val-
ues. Table 8-3 shows the valid oscillator configurations
(i.e., ECPLL, HSPLL, XTPLL and FRCPLL) for USB
operation. This sets the correct PLLDIV configuration
for the specified oscillator frequency and the output
frequency of the USB clock branch is always 48 MHz.
TABLE 8-3: VALID OSCILLATOR CONFIGURATIONS FOR USB OPERATIONS
Input Oscillator Frequency
Clock Mode
PLL Division
(PLLDIV<2:0>)
48 MHz
32 MHz
24 MHz
20 MHz
16 MHz
12 MHz
8 MHz
4 MHz
ECPLL
HSPLL, ECPLL
HSPLL, ECPLL
HSPLL, ECPLL
HSPLL, ECPLL
HSPLL, ECPLL
ECPLL, HSPLL, XTPLL, FRCPLL
ECPLL, HSPLL, XTPLL, FRCPLL
12 (111)
8 (110)
6 (101)
5 (100)
4 (011)
3 (010)
2 (001)
1 (000)
Note:
For USB devices, the use of a primary oscillator or external clock source, with a frequency above 32 MHz,
does not imply that the device’s system clock can be run at the same speed when the USB module is not
used. The maximum system clock for all PIC24F devices is 32 MHz.
DS39975A-page 146
 2010 Microchip Technology Inc.