PIC24FV32KA304_1 Datasheet, PDF (56/320 Pages) Microchip Technology – 20/28/44/48-Pin, General Purpose, 16-Bit Flash Microcontrollers with XLP Technology

PIC24FV32KA304 FAMILY
In a similar fashion, two table instructions, TBLWTH
and TBLWTL, are used to write individual bytes or
words to a program space address. The details of
their operation are explained in Section 5.0 “Flash
Program Memory”.
For all table operations, the area of program memory
space to be accessed is determined by the Table
Memory Page Address register (TBLPAG). TBLPAG
covers the entire program memory space of the
device, including user and configuration spaces. When
TBLPAG<7> = 0, the table page is located in the user
memory space. When TBLPAG<7> = 1, the page is
located in configuration space.
Note:
Only table read operations will execute in
the configuration memory space, and only
then, in implemented areas, such as the
Device ID. Table write operations are not
allowed.
FIGURE 4-6:
ACCESSING PROGRAM MEMORY WITH TABLE INSTRUCTIONS
TBLPAG
00
23
15
Program Space
0 000000h
002BFEh
23
00000000
00000000
00000000
00000000
Data EA<15:0>
16
8
0
‘Phantom’ Byte
800000h
TBLRDH.B (Wn<0> = 0)
TBLRDL.B (Wn<0> = 1)
TBLRDL.B (Wn<0> = 0)
TBLRDL.W
The address for the table operation is determined by the data EA
within the page defined by the TBLPAG register. Only read
operations are provided; write operations are also valid in the
user memory area.
 2011 Microchip Technology Inc.
DS39995B-page 56