PIC24FV32KA304_1 Datasheet, PDF (50/320 Pages) Microchip Technology – 20/28/44/48-Pin, General Purpose, 16-Bit Flash Microcontrollers with XLP Technology

TABLE 4-17: CTMU REGISTER MAP
File Name Addr Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
CTMUCON1 035A CTMUEN
—
CTMUSIDL TGEN
EDGEN EDGSEQEN IDISSEN
CTMUCON2 035C EDG1EDGE EDG1POL EDG1SEL3 EDG1SEL2 EDG1SEL1 EDG1SEL0 EDG2
CTMUICON 035E ITRIM5
ITRIM4
ITRIM3
ITRIM2
ITRIM1
ITRIM0 IRNG1
AD1CTMUENH 0360
—
—
—
—
—
—
—
AD1CTMUENL 0362 CTMEN15 CTMEN14 CTMEN13 CTMEN12 CTMEN11 CTMEN10 CTMEN9
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
CTTRIG
—
—
—
—
—
—
—
EDG1 EDG2EDGE EDG2POL EDG2SEL3 EDG2SEL2 EDG2SEL1 EDG2SEL0 —
IRNG0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
CTMEN17
CTMEN8 CTMEN7 CTMEN6 CTMEN5 CTMEN4 CTMEN3 CTMEN2 CTMEN1
—
—
—
CTMEN16
CTMEN0
0000
0000
0000
0000
0000
TABLE 4-18: ANALOG SELECT REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13
Bit 12 Bit 11 Bit 10
ANSA
ANSB
ANSC
Legend:
Note 1:
2:
04E0
—
—
—
—
—
—
04E2 ANSB15 ANSB14 ANSB13 ANSB12
—
—
04E4
—
—
—
—
—
—
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
These bits are not implemented in 20-pin devices.
These bits are not implemented in 28-pin devices.
Bit 9
—
—
—
Bit 8
—
—
—
Bit 7
—
—
—
Bit 6
—
—
—
Bit 5
—
—
—
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
—
ANSB4
—
ANSA3 ANSA2
ANSA1
ANSB3⁽¹⁾ ANSB2
ANSB1
—
ANSC2^(1,2) ANSC1^(1,2)
ANSA0
ANSB0
ANSC0⁽¹⁾
000F
F01F
0007
TABLE 4-19: REAL-TIME CLOCK AND CALENDAR REGISTER MAP
File Name Addr Bit 15 Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
ALRMVAL 0620
ALCFGRPT 0622 ALRMEN CHIME AMASK3 AMASK2 AMASK1 AMASK0
RTCVAL 0624
RCFGCAL 0626 RTCEN
—
RTCWREN RTCSYNC HALFSEC RTCOE
RTCPWC 0628 PWCEN PWCPOL PWCCPRE PWCSPRE RTCCLK1 RTCCLK0
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
ALRMVAL
ALRMPTR1 ALRMPTR0
RTCVAL
RTCPTR1 RTCPTR0
RTCOUT1 RTCOUT0
ARPT7
CAL7
—
ARPT6
CAL6
—
ARPT5 ARPT4
CAL5
—
CAL4
—
ARPT3
CAL3
—
xxxx
ARPT2 ARPT1 ARPT0 0000
CAL2
—
CAL1
—
CAL0
—
xxxx
0000
xxxx
TABLE 4-20: TRIPLE COMPARATOR REGISTER MAP
File
Name
Addr Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
CMSTAT
0630 CMIDL
—
—
—
—
C3EVT
CVRCON 0632
—
—
—
—
—
—
CM1CON 0634 CON
COE
CPOL
CLPWR
—
—
CM2CON 0636 CON
COE
CPOL
CLPWR
—
—
CM3CON 0638 CON
COE
CPOL
CLPWR
—
—
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 9
C2EVT
—
CEVT
CEVT
CEVT
Bit 8
C1EVT
—
COUT
COUT
COUT
Bit 7
Bit 6 Bit 5 Bit 4
—
CVREN
EVPOL1
EVPOL1
EVPOL1
—
—
CVROE CVRSS
EVPOL0 —
EVPOL0 —
EVPOL0 —
—
CVR4
CREF
CREF
CREF
Bit 3
—
CVR3
—
—
—
Bit 2 Bit 1 Bit 0
C3OUT
CVR2
—
—
—
C2OUT
CVR1
CCH1
CCH1
CCH1
C1OUT
CVR0
CCH0
CCH0
CCH0
All
Resets
xxxx
0000
xxxx
0000
0000