PIC18F8723 Datasheet, PDF (55/60 Pages) Microchip Technology – 64/80-Pin, 1-Mbit,Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt Technology

INDEX
A
A/D ...................................................................................... 29
A/D Converter Interrupt, Configuring .......................... 33
Acquisition Requirements ........................................... 34
ADCON0 Register....................................................... 29
ADCON1 Register....................................................... 29
ADCON2 Register....................................................... 29
ADRESH Register................................................. 29, 32
ADRESL Register ....................................................... 29
Analog Port Pins, Configuring..................................... 36
Associated Registers .................................................. 38
Configuring the Module............................................... 33
Conversion Clock (TAD) .............................................. 35
Conversion Status (GO/DONE Bit) ............................. 32
Conversions ................................................................ 37
Converter Characteristics ........................................... 44
Discharge.................................................................... 37
Operation in Power-Managed Modes ......................... 36
Selecting and Configuring Acquisition Time ............... 35
Special Event Trigger (ECCP2) .................................. 38
Transfer Function........................................................ 33
Use of the ECCP2 Trigger .......................................... 38
Absolute Maximum Ratings ................................................ 41
ADCON0 Register............................................................... 29
GO/DONE Bit.............................................................. 32
ADCON1 Register............................................................... 29
ADCON2 Register............................................................... 29
ADRESH Register............................................................... 29
ADRESL Register ......................................................... 29, 32
Analog-to-Digital Converter. See A/D.
B
Block Diagrams
A/D .............................................................................. 32
Analog Input Model ..................................................... 33
PIC18F6628/6723......................................................... 9
PIC18F8628/8723....................................................... 10
C
Compare (ECCP2 Module)
Special Event Trigger.................................................. 38
Conversion Considerations ................................................. 50
Customer Change Notification Service ............................... 55
Customer Notification Service............................................. 55
Customer Notification System............................................... 5
Customer Support ............................................................... 55
D
Device Differences .............................................................. 49
Device ID Registers ............................................................ 39
Device Overview
Features (table)............................................................. 8
Special Features ........................................................... 7
E
Electrical Characteristics..................................................... 41
Equations
A/D Acquisition Time................................................... 34
A/D Minimum Charging Time...................................... 34
Calculating the Minimum Required
Acquisition Time ................................................. 34
Errata .................................................................................... 5
External Memory Interface .................................................... 1
PIC18F8723 FAMILY
F
Features Summary Table ..................................................... 1
I
Internet Address ................................................................. 55
Interrupt Sources
A/D Conversion Complete .......................................... 33
M
Microchip Internet Web Site................................................ 55
Migration From Baseline to Enhanced Devices.................. 50
Migration From High-End to Enhanced Devices................. 51
Migration From Mid-Range to Enhanced Devices .............. 51
More Information................................................................... 5
Customer Notification System ...................................... 5
Errata............................................................................ 5
O
Overview
External Memory Interface ........................................... 1
Features Summary Table ............................................. 1
Peripheral Highlights .................................................... 1
Power-Managed Modes ............................................... 1
Special Microcontroller Features .................................. 1
P
Packaging Information ........................................................ 47
Peripheral Highlights............................................................. 1
Pin Diagrams
64-Pin TQFP................................................................. 2
80-Pin TQFP................................................................. 3
Pin Functions
AVDD (64-pin) ............................................................. 18
AVDD (80-pin) ............................................................. 28
AVSS (64-pin).............................................................. 18
AVSS (80-pin).............................................................. 28
OSC1/CLKI/RA7................................................... 11, 19
OSC2/CLKO/RA6 ................................................. 11, 19
RA0/AN0............................................................... 12, 20
RA1/AN1............................................................... 12, 20
RA2/AN2/VREF- .................................................... 12, 20
RA3/AN3/VREF+ ................................................... 12, 20
RA4/T0CKI ........................................................... 12, 20
RA5/AN4/HLVDIN ................................................ 12, 20
RB0/INT0/FLT0 .................................................... 13, 21
RB1/INT1.............................................................. 13, 21
RB2/INT2.............................................................. 13, 21
RB3/INT3.................................................................... 13
RB3/INT3/ECCP2/P2A ............................................... 21
RB4/KBI0.............................................................. 13, 21
RB5/KBI1/PGM..................................................... 13, 21
RB6/KBI2/PGC ..................................................... 13, 21
RB7/KBI3/PGD ..................................................... 13, 21
RC0/T1OSO/T13CKI ............................................ 14, 22
RC1/T1OSI/ECCP2/P2A ...................................... 14, 22
RC2/ECCP1/P1A.................................................. 14, 22
RC3/SCK1/SCL1 .................................................. 14, 22
RC4/SDI1/SDA1 ................................................... 14, 22
RC5/SDO1............................................................ 14, 22
RC6/TX1/CK1....................................................... 14, 22
RC7/RX1/DT1....................................................... 14, 22
RD0/AD0/PSP0 .......................................................... 23
RD0/PSP0 .................................................................. 15
© 2007 Microchip Technology Inc.
Preliminary
DS39894A-page 53