PIC18F8723 Datasheet, PDF (28/60 Pages) Microchip Technology – 64/80-Pin, 1-Mbit,Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt Technology

PIC18F8723 FAMILY
TABLE 1-3: PIC18F8628/8723 (80-PIN) PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number _{Pin Buffer}
TQFP
Type Type
Description
PORTG is a bidirectional I/O port.
RG0/ECCP3/P3A
RG0
ECCP3
P3A
5
I/O
ST
Digital I/O.
I/O
ST
Enhanced Capture 3 input/Compare 3 output/
PWM3 output.
O
—
ECCP3 PWM output A.
RG1/TX2/CK2
RG1
TX2
CK2
6
I/O
ST
Digital I/O.
O
—
EUSART2 asynchronous transmit.
I/O
ST
EUSART2 synchronous clock (see related RX2/DT2).
RG2/RX2/DT2
RG2
RX2
DT2
7
I/O
ST
Digital I/O.
I
ST
EUSART2 asynchronous receive.
I/O
ST
EUSART2 synchronous data (see related TX2/CK2).
RG3/CCP4/P3D
RG3
CCP4
P3D
8
I/O
ST
Digital I/O.
I/O
ST
Capture 4 input/Compare 4 output/PWM4 output.
O
—
ECCP3 PWM output D.
RG4/CCP5/P1D
RG4
CCP5
P1D
10
I/O
ST
Digital I/O.
I/O
ST
Capture 5 input/Compare 5 output/PWM5 output.
O
—
ECCP1 PWM output D.
RG5
See RG5/MCLR/VPP pin.
Legend:
Note 1:
2:
3:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
P = Power
O
= Output
I²C™/SMB = I²C/SMBus input buffer
Alternate assignment for ECCP2 when Configuration bit, CCP2MX, is cleared (all operating modes except
Microcontroller mode).
Default assignment for ECCP2 in all operating modes (CCP2MX is set).
Alternate assignment for ECCP2 when CCP2MX is cleared (Microcontroller mode only).
4: Default assignment for P1B/P1C/P3B/P3C (ECCPMX is set).
5: Alternate assignment for P1B/P1C/P3B/P3C (ECCPMX is clear).
DS39894A-page 26
Preliminary
© 2007 Microchip Technology Inc.