PIC18F8723 Datasheet, PDF (21/60 Pages) Microchip Technology – 64/80-Pin, 1-Mbit,Enhanced Flash Microcontrollers with 12-Bit A/D and nanoWatt Technology

PIC18F8723 FAMILY
TABLE 1-3: PIC18F8628/8723 (80-PIN) PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number _{Pin Buffer}
TQFP
Type Type
Description
RG5/MCLR/VPP
RG5
MCLR
VPP
9
Master Clear (input) or programming voltage (input).
I
ST
Digital input.
I
ST
Master Clear (Reset) input. This pin is an active-low
Reset to the device.
P
Programming voltage input.
OSC1/CLKI/RA7
OSC1
CLKI
RA7
49
Oscillator crystal or external clock input.
I
ST
Oscillator crystal input or external clock source input.
ST buffer when configured in RC mode, CMOS
otherwise.
I CMOS External clock source input. Always associated with
pin function OSC1. (See related OSC1/CLKI,
OSC2/CLKO pins.)
I/O TTL
General purpose I/O pin.
OSC2/CLKO/RA6
OSC2
CLKO
RA6
50
Oscillator crystal or clock output.
O
—
Oscillator crystal output. Connects to crystal or
resonator in Crystal Oscillator mode.
O
—
In RC mode, OSC2 pin outputs CLKO, which has 1/4 the
frequency of OSC1 and denotes the
instruction cycle rate.
I/O TTL
General purpose I/O pin.
Legend:
Note 1:
2:
3:
4:
5:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
P = Power
O
= Output
I²C™/SMB = I²C/SMBus input buffer
Alternate assignment for ECCP2 when Configuration bit, CCP2MX, is cleared (all operating modes except
Microcontroller mode).
Default assignment for ECCP2 in all operating modes (CCP2MX is set).
Alternate assignment for ECCP2 when CCP2MX is cleared (Microcontroller mode only).
Default assignment for P1B/P1C/P3B/P3C (ECCPMX is set).
Alternate assignment for P1B/P1C/P3B/P3C (ECCPMX is clear).
© 2007 Microchip Technology Inc.
Preliminary
DS39894A-page 19