PIC18F4580 Datasheet, PDF (436/484 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2480/2580/4480/4580
27.4.3 TIMING DIAGRAMS AND SPECIFICATIONS
FIGURE 27-5:
EXTERNAL CLOCK TIMING (ALL MODES EXCEPT PLL)
Q4
Q1
Q2
Q3
Q4
Q1
OSC1
CLKO
1
3
3
4
4
2
TABLE 27-6: EXTERNAL CLOCK TIMING REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max Units
Conditions
1A
FOSC
External CLKI Frequency⁽¹⁾
DC
Oscillator Frequency⁽¹⁾
DC
40
MHz EC, ECIO Oscillator mode
4
MHz RC Oscillator mode
0.1
4
MHz XT Oscillator mode
4
25
MHz HS Oscillator mode
4
10
MHz HS + PLL Oscillator mode
5
200
kHz LP Oscillator mode
1
TOSC
External CLKI Period⁽¹⁾
25
—
ns EC, ECIO Oscillator mode
Oscillator Period⁽¹⁾
250
—
ns RC Oscillator mode
250
10,000 ns XT Oscillator mode
40
250
ns HS Oscillator mode
100
250
ns HS + PLL Oscillator mode
25
—
µs LP Oscillator mode
2
TCY
Instruction Cycle Time⁽¹⁾
100
—
ns TCY = 4/FOSC
3
TOSL, External Clock in (OSC1)
30
—
ns XT Oscillator mode
TOSH
High or Low Time
2.5
—
µs LP Oscillator mode
10
—
ns HS Oscillator mode
4
TOSR, External Clock in (OSC1)
—
TOSF
Rise or Fall Time
—
20
ns XT Oscillator mode
50
ns LP Oscillator mode
—
7.5
ns HS Oscillator mode
Note 1:
Instruction cycle period (TCY) equals four times the input oscillator time base period for all configurations
except PLL. All specified values are based on characterization data for that particular oscillator type under
standard operating conditions with the device executing code. Exceeding these specified limits may result
in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested
to operate at “min.” values with an external clock applied to the OSC1/CLKI pin. When an external clock
input is used, the “max.” cycle time limit is “DC” (no clock) for all devices.
DS39637A-page 434
Preliminary
 2004 Microchip Technology Inc.