PIC18F4580 Datasheet, PDF (343/484 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology

PIC18F2480/2580/4480/4580
23.15.6.1 Receiver Overflow
An overflow condition occurs when the MAB has
assembled a valid received message (the message
meets the criteria of the acceptance filters) and the
receive buffer associated with the filter is not available
for loading of a new message. The associated
RXBnOVFL bit in the COMSTAT register will be set to
indicate the overflow condition. This bit must be cleared
by the MCU.
23.15.6.2 Receiver Warning
The receive error counter has reached the MCU
warning limit of 96.
23.15.6.3 Transmitter Warning
The transmit error counter has reached the MCU
warning limit of 96.
23.15.6.4 Receiver Bus Passive
The receive error counter has exceeded the error-
passive limit of 127 and the device has gone to
error-passive state.
23.15.6.5 Transmitter Bus Passive
The transmit error counter has exceeded the error-
passive limit of 127 and the device has gone to
error-passive state.
23.15.6.6 Bus-Off
The transmit error counter has exceeded 255 and the
device has gone to bus-off state.
23.15.6.7 Interrupt Acknowledge
Interrupts are directly associated with one or more
status flags in the PIR register. Interrupts are pending
as long as one of the flags is set. Once an interrupt flag
is set by the device, the flag can not be reset by the
microcontroller until the interrupt condition is removed.
 2004 Microchip Technology Inc.
Preliminary
DS39637A-page 341