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PIC18F4580 Datasheet, PDF (127/484 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology | |||
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PIC18F2480/2580/4480/4580
REGISTER 9-11:
IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
R/W-1 R/W-1
U-0
OSCFIP CMIP(1)
â
R/W-1
EEIP
R/W-1
BCLIP
R/W-1
HLVDIP
bit 7
R/W-1
TMR3IP
R/W-1
ECCP1IP(2)
bit 0
bit 7
OSCFIP: Oscillator Fail Interrupt Priority bit
1 = High priority
0 = Low priority
bit 6
CMIP: Comparator Interrupt Priority bit(1)
1 = High priority
0 = Low priority
bit 5
Unimplemented: Read as â0â
bit 4
EEIP: Data EEPROM/Flash Write Operation Interrupt Priority bit
1 = High priority
0 = Low priority
bit 3
BCLIP: Bus Collision Interrupt Priority bit
1 = High priority
0 = Low priority
bit 2
HLVDIP: High/Low-Voltage Detect Interrupt Priority bit
1 = High priority
0 = Low priority
bit 1
TMR3IP: TMR3 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
bit 0
ECCP1IP: CCP1 Interrupt Priority bit(2)
1 = High priority
0 = Low priority
Note 1: This bit is available in PIC18F4X80 devices and reserved in PIC18F2X80 devices.
2: This bit is available in PIC18F4X80 devices only.
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared x = Bit is unknown
 2004 Microchip Technology Inc.
Preliminary
DS39637A-page 125
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