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PIC16F722AT-ISS Datasheet, PDF (42/286 Pages) Microchip Technology – 28-Pin Flash Microcontrollers with nanoWatt XLP Technology | |||
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PIC16(L)F722A/723A
4.5.3 PIE2 REGISTER
The PIE2 register contains the interrupt enable bits, as
shown in Register 4-3.
Note: Bit PEIE of the INTCON register must be
set to enable any peripheral interrupt.
REGISTER 4-3: PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
U-0
U-0
U-0
U-0
U-0
U-0
U-0
â
â
â
â
â
â
â
bit 7
R/W-0
CCP2IE
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared
x = Bit is unknown
bit 7-1
bit 0
Unimplemented: Read as â0â
CCP2IE: CCP2 Interrupt Enable bit
1 = Enables the CCP2 interrupt
0 = Disables the CCP2 interrupt
DS41417B-page 42
ï£ 2010-2012 Microchip Technology Inc.
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