PIC16F722AT-ISS Datasheet, PDF (122/286 Pages) Microchip Technology – 28-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC16(L)F722A/723A
REGISTER 14-2: CPSCON1: CAPACITIVE SENSING CONTROL REGISTER 1
U-0
—
bit 7
U-0
U-0
U-0
U-0
R/W-0
R/W-0
—
—
—
—
CPSCH2
CPSCH1
R/W-0
CPSCH0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-3
bit 2-0
Unimplemented: Read as ‘0’
CPSCH<2:0>: Capacitive Sensing Channel Select bits
If CPSON = 0:
These bits are ignored. No channel is selected.
If CPSON = 1:
0000 = channel 0, (CPS0)
0001 = channel 1, (CPS1)
0010 = channel 2, (CPS2)
0011 = channel 3, (CPS3)
0100 = channel 4, (CPS4)
0101 = channel 5, (CPS5)
0110 = channel 6, (CPS6)
0111 = channel 7, (CPS7)
TABLE 14-2: SUMMARY OF REGISTERS ASSOCIATED WITH CAPACITIVE SENSING
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
ANSELA
ANSELB
—
—
ANSA5 ANSA4 ANSA3 ANSA2 ANSA1 ANSA0
49
—
—
ANSB5 ANSB4 ANSB3 ANSB2 ANSB1 ANSB0
58
OPTION_REG RBPU INTEDG T0CS
T0SE
PSA
PS2
PS1
PS0
23
PIE1
TMR1GIE ADIE
RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE 41
PIR1
TMR1GIF ADIF
RCIF
TXIF
SSPIF CCP1IF TMR2IF TMR1IF 43
T1CON
TMR1CS1 TMR1CS0 T1CKPS1 T1CKPS0 T1OSCEN T1SYNC — TMR1ON 112
T2CON
— TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 116
TRISA
TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 48
TRISB
TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 57
Legend: - = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the
capacitive sensing module.
DS41417B-page 122
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