PIC18LF2X Datasheet, PDF (40/44 Pages) Microchip Technology – 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with XLP Technology

PIC18(L)F2X/4XK50
6.0 AC/DC CHARACTERISTICS TIMING REQUIREMENTS FOR PROGRAM/
VERIFY TEST MODE (CONTINUED)
Standard Operating Conditions
Operating Temperature: 25C is recommended
Param
No.
Sym.
Characteristic
Min.
Max. Units
Conditions
P11B
P12
TDLY7B Delay for Self-Timed Memory Write
THLD2 Input Data Hold Time from MCLR/VPP/
RE3 
2
—
ms
2
—
s
P13 TSET2 VDD Setup Time to MCLR/VPP/RE3 
100
—
ns
P14 TVALID Data Out Valid from PGC 
10
—
ns
P15 THLD4 Input data hold time from MCLR 
400
—
s
P16 TDLY8 Delay between Last PGC  and MCLR/VPP/RE3 
0
—
s
P17 THLD3 MCLR/VPP/RE3 to VDD 
—
100 ns
P18 TKEY1 Delay from First MCLR to first PGC for Key Sequence on
1
PGD
—
ms
P19 THIZ Delay from PGC to PGD High-Z
3
10
ns
P20 TKEY2 Delay from Last PGC for Key Sequence on PGD to
Second MCLR 
40
—
ns
Note 1:
Do not allow excess time when transitioning MCLR between VIL and VIHH; this can cause spurious program executions
to occur. The maximum transition time is:
1 TCY + TPWRT (if enabled) + 1024 TOSC (for LP, HS, HS/PLL and XT modes only) + 2 ms (for HS/PLL mode only) + 1.5
s (for EC mode only) where TCY is the instruction cycle time, TPWRT is the Power-up Timer period and TOSC is the
oscillator period. For specific values, refer to the Electrical Characteristics section of the device data sheet for the
particular device.
DS41630B-page 40
 2012 Microchip Technology Inc.